Patent classifications
H10N30/067
Microphone device with single crystal piezoelectric film and method of forming the same
A method of forming a microphone device includes: forming a through-hole in a substrate wafer; providing a second wafer; bonding the second wafer to the substrate wafer; and forming a top electrode over a first surface of a single-crystal piezoelectric film of the second wafer. The second wafer may include the single-crystal piezoelectric film. The single-crystal piezoelectric film may have a first surface and an opposing second surface. The second wafer may further include a bottom electrode arranged adjacent to the second surface, and a support member over the single-crystal piezoelectric film. The through-hole in substrate wafer may be at least substantially aligned with at least one of the top electrode and the bottom electrode.
Microphone device with single crystal piezoelectric film and method of forming the same
A method of forming a microphone device includes: forming a through-hole in a substrate wafer; providing a second wafer; bonding the second wafer to the substrate wafer; and forming a top electrode over a first surface of a single-crystal piezoelectric film of the second wafer. The second wafer may include the single-crystal piezoelectric film. The single-crystal piezoelectric film may have a first surface and an opposing second surface. The second wafer may further include a bottom electrode arranged adjacent to the second surface, and a support member over the single-crystal piezoelectric film. The through-hole in substrate wafer may be at least substantially aligned with at least one of the top electrode and the bottom electrode.
Piezoelectric element and method for manufacturing piezoelectric element
Provided are a piezoelectric element having high stability, which operates with high efficiency, and a method for manufacturing the piezoelectric element. The piezoelectric element (10) has a laminate structure in which a first electrode (14), a first piezoelectric film (16), a second electrode (18), an adhesion layer (20), an interlayer (22), a third electrode (24), a second piezoelectric film (26), and a fourth electrode (28) are laminated in this order on a silicon substrate (12). The interlayer (22) is formed of a material different from that of the second electrode (18) and has a thickness of 0.4 μm to 10 μm. A device having a diaphragm structure or a cantilever structure is formed by removing a part of the silicon substrate (12). The respective layers (14 to 28) laminated on the silicon substrate (12) can be formed using a thin film formation method represented by a vapor phase epitaxial method.
Manufacturing method for piezoelectric ceramic chip, piezoelectric ceramic chip assembly and display device
The present disclosure provides a manufacturing method for a piezoelectric ceramic chip, a piezoelectric ceramic chip assembly and a display device. The manufacturing method includes: transferring a piezoelectric ceramic layer and a bottom electrode covering the piezoelectric ceramic layer formed on a substrate to a base plate, forming an insulating layer with an opening on the base plate, so that edges of the piezoelectric ceramic layer and the bottom electrode are covered by the insulating layer, and the piezoelectric ceramic layer is exposed from the opening; etching the base plate by immersing the base plate in an etching solution for etching a material of the bottom electrode; and forming a top electrode in the opening of the insulating layer, so that the top electrode is spaced apart from the insulating layer.
Manufacturing method for piezoelectric ceramic chip, piezoelectric ceramic chip assembly and display device
The present disclosure provides a manufacturing method for a piezoelectric ceramic chip, a piezoelectric ceramic chip assembly and a display device. The manufacturing method includes: transferring a piezoelectric ceramic layer and a bottom electrode covering the piezoelectric ceramic layer formed on a substrate to a base plate, forming an insulating layer with an opening on the base plate, so that edges of the piezoelectric ceramic layer and the bottom electrode are covered by the insulating layer, and the piezoelectric ceramic layer is exposed from the opening; etching the base plate by immersing the base plate in an etching solution for etching a material of the bottom electrode; and forming a top electrode in the opening of the insulating layer, so that the top electrode is spaced apart from the insulating layer.
PRESSURE SENSOR BASED ON ZINC OXIDE NANOWIRES AND METHOD OF MANUFACTURING PRESSURE SENSOR
A pressure sensor based on zinc oxide nanowires and a method of manufacturing a pressure sensor based on zinc oxide nanowires are provided. The manufacturing method includes: manufacturing a bottom electrode on a substrate; manufacturing a seed layer on the bottom electrode; manufacturing a zinc oxide nanowire layer on the seed layer; manufacturing a support layer on the zinc oxide nanowire layer; and manufacturing a top electrode on the support layer.
PRESSURE SENSOR BASED ON ZINC OXIDE NANOWIRES AND METHOD OF MANUFACTURING PRESSURE SENSOR
A pressure sensor based on zinc oxide nanowires and a method of manufacturing a pressure sensor based on zinc oxide nanowires are provided. The manufacturing method includes: manufacturing a bottom electrode on a substrate; manufacturing a seed layer on the bottom electrode; manufacturing a zinc oxide nanowire layer on the seed layer; manufacturing a support layer on the zinc oxide nanowire layer; and manufacturing a top electrode on the support layer.
Voltage breakdown uniformity in piezoelectric structure for piezoelectric devices
In some embodiments, the present disclosure relates to a processing tool that includes a wafer chuck disposed within a hot plate chamber and having an upper surface configured to hold a semiconductor wafer. A heating element is disposed within the wafer chuck and configured to increase a temperature of the wafer chuck. A motor is coupled to the wafer chuck and configured to rotate the wafer chuck around an axis of rotation extending through the upper surface of the wafer chuck. The processing tool further includes control circuitry coupled to the motor and configured to operate the motor to rotate the wafer chuck while the temperature of the wafer chuck is increased to form a piezoelectric layer from a sol-gel solution layer on the semiconductor wafer.
Voltage breakdown uniformity in piezoelectric structure for piezoelectric devices
In some embodiments, the present disclosure relates to a processing tool that includes a wafer chuck disposed within a hot plate chamber and having an upper surface configured to hold a semiconductor wafer. A heating element is disposed within the wafer chuck and configured to increase a temperature of the wafer chuck. A motor is coupled to the wafer chuck and configured to rotate the wafer chuck around an axis of rotation extending through the upper surface of the wafer chuck. The processing tool further includes control circuitry coupled to the motor and configured to operate the motor to rotate the wafer chuck while the temperature of the wafer chuck is increased to form a piezoelectric layer from a sol-gel solution layer on the semiconductor wafer.
METHOD OF MAKING ACOUSTIC WAVE DEVICES WITH MULTI-LAYER PIEZOELECTRIC SUBSTRATE
A method of making an acoustic wave device includes forming or providing a substrate, forming or providing a functional layer over at least a portion of the substrate, forming or providing a piezoelectric layer over at least a portion of the functional layer, and forming or providing an interdigital transducer electrode over the piezoelectric layer. Forming or providing the piezoelectric layer includes removing a portion of the piezoelectric layer so that the piezoelectric layer has an outer edge spaced inward of an outer edge of the substrate, and so that the outer edge of the piezoelectric layer is tapered at an angle relative to a surface of the substrate to thereby reduce an acoustic reflection magnitude at said outer edge of the piezoelectric layer.