A piezoelectric substrate manufacturing device that includes first and electrodes that face each other with a piezoelectric substrate interposed therebetween; a cover that surrounds the second electrode such that the leading end of the second electrode is exposed; a supply unit that supplies a processing gas to an internal space of the cover; a processing unit that performs surface processing on the piezoelectric substrate by applying a voltage between the first and second electrodes causing the processing gas to change into plasma; a detector that is provided outside the cover with its relative position fixed with respect to the second electrode; a measurement unit that measures the thickness of the piezoelectric substrate using the detector; a driving unit that changes the relative positions of the first and second electrodes; and a control unit that controls the supply unit, the processing unit, the measurement unit, and the driving unit.

A piezoelectric transducer includes a semiconductor body with a bottom electrode of conductive material. A piezoelectric element is on the bottom electrode. A first protective layer, on the bottom electrode and the piezoelectric element, has a first opening through which a portion of the piezoelectric element is exposed, and a second opening through which a portion of the bottom electrode is exposed. A conductive layer on the first protective layer and within the first and second openings is patterned to form a top electrode in electrical contact with the piezoelectric element at the first opening, a first biasing stripe in electrical contact with the top electrode, and a second biasing stripe in electrical contact with the bottom electrode at the second opening.

A method for fabricating an array of front ends for an array of packaged electronic components that each comprise: an electrical element packaged within a package comprising a front part of a package comprising an inner section with a cavity therein opposite the resonator defined by the raised frame and an outer section sealing said cavity; and a back part of the package comprising a back cavity in an inner back section, and an outer back section sealing the cavity, said back package further comprising a first and a second via through the back end around said at least one back cavity for coupling to front and back electrodes of the electronic component; the vias terminating in external contact pads that are coupleable in a ‘flip chip’ configuration to a circuit board; the method comprising the stages of: i. Obtaining a carrier substrate having an active membrane layer attached thereto by its rear surface, with a front electrode on the front surface of the active membrane layer; ii. Obtaining an inner front end section; iii. Attaching the inner front end section to the exposed front surface of the front electrode; iv. Detaching the carrier substrate from the rear surface of the active membrane layer; v. Optionally thinning the inner front section; vi. Processing the rear surface by removing material to create an array of at least one island of active membrane on at least one island of front electrode; vii. Creating an array of at least one front cavity by selectively removing at least outer layer of the inner front end section, such that there is one cavity opposite each island of membrane on the front side of the front electrode on the opposite side to the island of active membrane; viii. Applying an outer front end section to the inner front end section and bonding the outer front end section to an outer surface of the inner front end section such that the outer front end section spans across and seals the at least one cavity of the array of front cavities.

A transducer of the preferred embodiment including a transducer and a plurality of adjacent, tapered cantilevered beams. Each of the beams define a beam base, a beam tip, and a beam body disposed between the beam base and the beam tip. The beams are arranged such that each of the beam tips extends toward a common area. Each beam is joined to the substrate along the beam base and is free from the substrate along the beam body. A preferred method of manufacturing a transducer can include: depositing alternating layers of piezoelectric and electrode onto the substrate in block, processing the deposited layers to define cantilever geometry in block, depositing metal traces in block, and releasing the cantilevered beams from the substrate in block.

A MEMS piezoelectric device includes a monolithic semiconductor body having first and second main surfaces extending parallel to a horizontal plane formed by first and second horizontal axes. A housing cavity is arranged within the monolithic semiconductor body. A membrane is suspended above the housing cavity at the first main surface. A piezoelectric material layer is arranged above a first surface of the membrane with a proof mass coupled to a second surface, opposite to the first surface, along the vertical axis. An electrode arrangement is provided in contact with the piezoelectric material layer. The proof mass causes deformation of the piezoelectric material layer in response to environmental mechanical vibrations. The proof mass is coupled to the membrane by a connection element arranged, in a central position, between the membrane and the proof mass in the direction of the vertical axis.

An optical device includes a gallium and nitrogen containing substrate comprising a surface region configured in a (20-2-1) orientation, a (30-3-1) orientation, or a (30-31) orientation, within +/−10 degrees toward c-plane and/or a-plane from the orientation. Optical devices having quantum well regions overly the surface region are also disclosed.

A MEMS piezoelectric device includes a monolithic semiconductor body having first and second main surfaces extending parallel to a horizontal plane formed by first and second horizontal axes. A housing cavity is arranged within the monolithic semiconductor body. A membrane is suspended above the housing cavity at the first main surface. A piezoelectric material layer is arranged above a first surface of the membrane with a proof mass coupled to a second surface, opposite to the first surface, along the vertical axis. An electrode arrangement is provided in contact with the piezoelectric material layer. The proof mass causes deformation of the piezoelectric material layer in response to environmental mechanical vibrations. The proof mass is coupled to the membrane by a connection element arranged, in a central position, between the membrane and the proof mass in the direction of the vertical axis.

A piezoelectric device that includes a sintered body in which a first conductor portion and a second conductor portion are disposed on both principal surfaces of a piezoelectric ceramic base body. The first conductor portion includes conductive films having a predetermined pattern. An insulating film is formed on the principal surface of the piezoelectric ceramic base body on which the conductive films are disposed such that portions of the conductive films are exposed therethrough. The insulating film has a malleability equal to or greater than that of the conductive films.

A thin-film piezoelectric-material element includes a laminated structure part having a lower electrode film, a piezoelectric-material film laminated on the lower electrode film and an upper electrode film laminated on the piezoelectric-material film, a lower piezoelectric-material protective-film being formed with alloy material, and an upper piezoelectric-material protective-film being formed with alloy material. The piezoelectric-material film includes a size larger than the upper electrode film, a riser end-surface and step-surface formed on a top-surface of the upper electrode film side. The riser end-surface connects smoothly with a peripheral end-surface of the upper electrode film and vertically intersects with the top-surface. The step-surface intersects vertically with the riser end-surface. The lower piezoelectric-material protective-film, and the upper piezoelectric-material protective-film are formed with alloy material including Fe as main ingredient and having Co and Mo, by Ion beam deposition.

A method for manufacturing an element forming wafer includes the steps of: forming a thin layer on a semiconductor wafer having a plurality of chip forming regions; and adjusting stress generated in an element forming portion of the thin layer to have a specified value. The thin layer constitutes an element in each of the plurality of chip forming regions. The step of adjusting the stress includes: arranging a resist on the thin layer; exposing the resist to light using a photomask having openings; forming openings in the resist by developing the resist; and performing ion-implantation using the resist as a mask. The photomask used during the step of exposing the resist to light has a ratio of the openings that is adjusted based on the stress generated in the element forming portion.