According to various implementations of the invention, a vertical Josephson Junction device may be realized using molecular beam epitaxy (MBE) growth of YBCO and PBCO epitaxial layers in an a-axis crystal orientation. Various implementations of the invention provide improved vertical JJ devices using SiC or LSGO substrates; GaN, AlN, or MgO buffer layers; YBCO or LSGO template layers; YBCO conductive layers and various combinations of barrier layers that include PBCO, NBCO, and DBCO. Such JJ devices are simple to fabricate with wet and dry etching, and allow for superior current flow across the barrier layers.

A device and method for converting magnetic flux to voltage uses a linear Fraunhofer pattern of a 1D array of long Josephson junctions. The 1D array of Josephson junctions may include from 1 to 10.sup.9 junctions formed in a planar geometry with a bridge width within the range of 4-10 m.

The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) a superconducting component having a plurality of alternating narrow and wide portions; (2) a plurality of heat sources, each heat source of the plurality of heat sources coupled to a corresponding narrow portion of the plurality of alternating narrow and wide portions and configured to selectively provide heat to the corresponding narrow portion; (3) a bias current source coupled to each narrow portion of the plurality of alternating narrow and wide portions; and (4) an output node adapted to output a respective current while the plurality of superconducting components is in the non-superconducting state.

The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) superconducting components; (2) heat sources, each coupled to a corresponding superconducting component and configured to selectively provide heat to that component; and (3) a current source coupled to the superconducting components and configured to selectively provide: (a) a first current to bias the components such that combination of the first current and heat from any heat source causes the components to transition to a non-superconducting state; and (b) a second current to bias the components such that (i) combination of the second current and heat from each heat source causes the components to transition to the non-superconducting state, and (ii) a combination of the second current and heat from only a subset of the heat sources does not cause the components to transition to the non-superconducting state.

Electrical, mechanical, computing, and/or other devices that include components formed of extremely low resistance (ELR) materials, including, but not limited to, modified ELR materials, layered ELR materials, and new ELR materials, are described.

A joined body includes: a first superconducting layer, a barrier layer arranged on the first superconducting layer, and a second superconducting layer arranged on the barrier layer. The first superconducting layer, the barrier layer, and the second superconducting layer are formed of a REBCO. A leak current from one of the first superconducting layer and the second superconducting layer to the other of the first superconducting layer and the second superconducting layer is blocked by the barrier layer.

A method includes providing a film of a high-temperature superconductor compound on a substrate, where a portion of the film has a first oxygen state, and exposing a portion of the film to a focused ion beam to create a structure within the film. The structure may result from the portion of the film being partially or completely removed. The structure may be a trench along the length or width of the film. The method may include annealing the exposed portion of the film to a second oxygen state. The oxygen content of the second oxygen state may be greater or less than the oxygen content of the first oxygen state.

The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) a superconducting component having a plurality of alternating narrow and wide portions; (2) a plurality of heat sources, each heat source of the plurality of heat sources coupled to a corresponding narrow portion of the plurality of alternating narrow and wide portions and configured to selectively provide heat to the corresponding narrow portion; (3) a bias current source coupled to each narrow portion of the plurality of alternating narrow and wide portions; and (4) an output node adapted to output a respective current while the plurality of superconducting components is in the non-superconducting state.

The various embodiments described herein include methods, devices, and systems for implementing logic gates. In one aspect, a circuit includes: (1) superconducting components; (2) heat sources, each coupled to a corresponding superconducting component and configured to selectively provide heat to that component; and (3) a current source coupled to the superconducting components and configured to selectively provide: (a) a first current to bias the components such that combination of the first current and heat from any heat source causes the components to transition to a non-superconducting state; and (b) a second current to bias the components such that (i) combination of the second current and heat from each heat source causes the components to transition to the non-superconducting state, and (ii) a combination of the second current and heat from only a subset of the heat sources does not cause the components to transition to the non-superconducting state.

A device including a Josephson junction device including a first superconductor layer, a first oxide layer disposed on a first upper surface of the first superconductor layer, a second superconductor layer disposed to partially overlap the first superconductor layer, a second oxide layer disposed on a second upper surface of the second superconductor layer, and a third superconductor layer including a first portion facing the first upper surface of the first superconductor layer and a second portion facing the second upper surface of the second superconductor layer, and a first thickness of a first portion of the first oxide layer between a lower surface of the first portion of the third superconductor layer and a third upper surface of the first superconductor layer is less than a second thickness of a second portion of the first oxide layer.