A grain-boundary self-aligned resistive memory structure is provided enabling the closely-packed formation of multiple, oxide-based, ReRAM elements in parallel, each with its own compliance resistor. The structure is capable of forming multiple filaments, one per element, with the aim of reducing the variability in the composite ReRAM cell.

Resistive memory cells, precursors thereof, and methods of making resistive memory cells are described. In some embodiments, the resistive memory cells are formed from a resistive memory precursor that includes a switching layer precursor containing a plurality of oxygen vacancies that are present in a controlled distribution therein, optionally without the use of an oxygen exchange layer. In these or other embodiments, the resistive memory precursors described may include a second electrode formed on a switching layer precursor, wherein the second electrode is includes a second electrode material that is conductive but which does not substantially react with oxygen. Devices including resistive memory cells are also described.

Subject matter disclosed herein may relate to fabrication of correlated electron materials (CEMs) devices used, for example, to read from a resistive memory element or to write to a resistive memory element. In embodiments, by limiting current flow through a CEM device, the CEM device may operate in the absence of Mott and/or Mott-like transitions in a way that brings about symmetrical diode-like operation of the CEM device.

A re-writeable non-volatile memory device including a re-writeable non-volatile two-terminal memory element (ME) having tantalum. The ME including a first terminal, a second terminal, a first layer of a conductive metal oxide (CMO), and a second layer in direct contact with the first layer. The second layer and the first layer being operative to store at least one-bit of data as a plurality of resistive states, and the first and second layer are electrically in series with each other and with the first and second terminals.

Disclosed is a method for the fabrication of a correlated electron material (CEM) device comprising: forming a layer of a conductive substrate on a substrate; forming a layer of a correlated electron material on the layer of conductive substrate; forming a layer of a conductive overlay on the layer of correlated electron material; patterning these layers to form a stack comprising a conductive substrate, a CEM layer and a conductive overlay, on the substrate; forming a cover layer of an insulating material over the stack; and patterning the cover layer wherein: the patterning of the cover layer comprises etching a trench in the cover layer whereby to expose the conductive overlay; and the method further comprises treating the exposed conductive overlay to remove an oxidation layer there from.

In one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a first substrate. The method further includes performing a first process of processing a portion of the first film with plasma of first gas and a second process of removing the portion of the first film with plasma of second gas after the first process.

Subject matter herein disclosed relates to a method for the manufacture of a switching device comprising a silicon-containing correlated electron material. In embodiments, processes are described for forming the silicon-containing correlated electron material. These processes may use comparatively lower temperatures as compared to those used for forming a correlated electron material comprising a transition metal oxide.

According to one embodiment, the semiconductor memory device includes a first electrode, a first material layer, comprising a first material, located on the first electrode, a second material, surrounded by the first material of the first material layer, comprising a phase change material, and a second electrode provided on the first material.

A neuromorphic computing circuit includes a plurality of memristors that function as synapses. The neuromorphic computing circuit also includes a superconducting quantum interference device (SQUID) coupled to the plurality of memristors. The SQUID functions as a neuron such that the plurality of memristors and the SQUID form a neural unit of the neuromorphic computing circuit.

Resistive RAM (RRAM) devices having increased reliability and related manufacturing methods are described. Greater reliability of RRAM cells over time can be achieved by avoiding direct contact of metal electrodes with the device switching layer. The contact can be avoided by cladding the switching layer in a material such as silicon or using electrodes that may contain metal but have regions that are adjacent the switching layer and lack free metal ions except for possible trace amounts.