Semiconductor memory is provided wherein a memory cell includes a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell. The cell further includes a nonvolatile memory comprising a resistance change element configured to store data stored in the floating body under any one of a plurality of predetermined conditions. A method of operating semiconductor memory to function as volatile memory, while having the ability to retain stored data when power is discontinued to the semiconductor memory is described.

A method for locally annealing and crystallizing a thin film by directing ultrashort optical pulses from an ultrafast laser into the film. The ultrashort pulses can selectively produce an annealed pattern and/or activate dopants on the surface or within the film.

The present disclosure, in some embodiments, relates to a memory device. The memory device includes a dielectric protection layer having sidewalls defining an opening over a conductive interconnect within an inter-level dielectric (ILD) layer. A bottom electrode structure extends from within the opening to directly over the dielectric protection layer. A variable resistance layer is over the bottom electrode structure and a top electrode is over the variable resistance layer. A top electrode via is disposed on the top electrode and directly over the dielectric protection layer.

A method for locally annealing and crystallizing a thin film by directing ultrashort optical pulses from an ultrafast laser into the film. The ultrashort pulses can selectively produce an annealed pattern and/or activate dopants on the surface or within the film.

A composition of matter consisting primarily of a stabilizing element and a transition metal oxide, wherein the transition metal oxide is an anti-ferromagnetic Mott insulator with strong spin orbit interactions, and the composition of matter has a canted crystal structure.

A phase-change memory cell is formed by a heater, a crystalline layer disposed above the heater, and an insulating region surrounding sidewalls of the crystalline layer. The phase-change memory cell supports programming with a least three distinct data levels based on a selective amorphization of the crystalline layer.

A ReRAM device manufactured using 2-D Si.sub.2Te.sub.3 (silicon telluride) nanowires or nanoplates. The Si.sub.2Te.sub.3 nanowires exhibit a unique reversible resistance switching behavior driven by an applied electrical potential, which leads to switching of the NWs from a high-resistance state (HRS) to a low-resistance state (LRS). This switched LRS is highly stable unless the opposite potential is applied to switch the resistance back. This provides a new class of resistive switching based on semiconductor rather than dielectric materials. In several embodiments, the polarity of the initially applied potential along the Si.sub.2Te.sub.3 nanowires defines the switch “on” and “off” directions, which become permanent once set.

A semiconductor device including stacked structures. The stacked structures include at least two chalcogenide materials or alternating dielectric materials and conductive materials. A liner including alucone is formed on sidewalls of the stacked structures. Methods of forming the semiconductor device are also disclosed.

Memory cells and methods of forming and operating the same include forming a doped crystalline semiconductor memory layer on a first electrode. The doped crystalline semiconductor memory layer has a programmable dopant activation level that determines a resistance of the doped crystalline semiconductor memory layer. A second electrode is formed on the doped crystalline semiconductor memory layer.

In a method for forming a semiconductor device, a plurality of conductive lines is formed as a part of a first wiring level of the semiconductor device. The first wiring level is positioned over a first level having a plurality of transistor devices. The plurality of conductive lines extends parallel to the first level. In addition, a programmable horizontal bridge is formed that extends parallel to the first level, and electrically connects a first conductive line and a second conductive line of the plurality of conductive lines in the first wiring level. The programmable horizontal bridge is formed based on a programmable material that changes phase between a conductive state and a non-conductive state according to a current pattern delivered to the programmable horizontal bridge.