A phase change memory semiconductor structure includes a substrate; a landing pad located in the substrate; a dielectric located outwardly of the substrate; a heater element located in the substrate outward of the landing pad; a stack including an inner undoped chalcogenide layer outward of the dielectric, a doped chalcogenide layer outward of the inner undoped chalcogenide layer, and an outer undoped chalcogenide layer outward of the doped chalcogenide layer; and at least one lateral conductive metal layer associated with the stack.

A PCM cell includes a first electrode, a heater/PCM portion electrically connected to first electrode, the heater/PCM portion comprising a PCM material, a second electrode electrically connected to the PCM material, and an electrical insulator stack surrounding the projection liner. The stack includes a plurality of first layers comprised of a first material and having a plurality of first inner sides facing towards the projection liner, and a plurality of second layers alternating with the plurality of first layers, the plurality of second layers comprised of a second material that is different from the first material, and the second plurality of layers having a plurality of second inner sides facing towards the projection liner. The plurality of second inner sides that are offset from the plurality of first inner sides forming a plurality of gaps.

An electronic chip includes memory cells made of a phase-change material and a transistor. First and second vias extend from the transistor through an intermediate insulating layer to a same height. A first metal level including a first interconnection track in contact with the first via is located over the intermediate insulating layer. A heating element for heating the phase-change material is located on the second via, and the phase-change material is located on the heating element. A second metal level including a second interconnection track is located above the phase-change material. A third via extends from the phase-change material to the second interconnection track.

A phase-change memory cell includes, in at least a first portion, a stack of at least one germanium layer covered by at least one layer made of a first alloy of germanium, antimony, and tellurium In a programmed state, resulting from heating a portion of the stack to a sufficient temperature, portions of layers of germanium and of the first alloy form a second alloy made up of germanium, antimony, and tellurium, where the second alloy has a higher germanium concentration than the first alloy.

Semiconductor devices and methods for forming the semiconductor devices are described. An example semiconductor structure can include a substrate including a first electrode. The example semiconductor structure can further include a heater element directly contacting the first electrode in the substrate. The example semiconductor structure a phase change cell directly on the heater element. The sidewalls of the phase change cell can be encapsulated with a spacer. The example semiconductor structure a second electrode directly on the phase change cell and the spacer.

A method may include forming a bottom electrode in an interlayer dielectric, depositing a liner on top of the bottom electrode, depositing a phase change material layer on top of the liner, wherein a top surface of the liner is in direct contact with a bottom surface of the phase change material layer, and depositing a barrier on top of the phase change material layer, wherein a top surface of the phase change material layer is in direct contact with a bottom surface of the barrier. The barrier may be made of doped phase change material. The forming of the bottom electrode may further include forming a via in the interlayer dielectric, depositing an outer layer along a bottom and a sidewall of the via, depositing a middle layer on top of the outer layer, and depositing an inner layer on top of the middle layer.

A phase change memory (PCM) cell in an integrated circuit and a method of fabricating it involve depositing a layer of PCM material on a surface of a dielectric, and patterning the layer of PCM material into a plurality of PCM blocks. Heater material is formed on both sidewalls of each of the plurality of the PCM blocks to form a plurality of PCM cells. Each of the plurality of the PCM blocks and the heater material on both the sidewalls represents a PCM cell. An additional layer of the dielectric is deposited above and between the plurality of the PCM cells, and trenches are formed in the dielectric. Trenches are formed in contact with each side of each of the plurality of the PCM cells. Metal is deposited in each of the trenches. Current flow in the metal heats the heater material of one of the PCM cells.

An apparatus comprises a phase-change material, a first electrode at a first end of the phase-change material, a second electrode at a second end of the phase-change material, and a heating element coupled to a least a given portion of the phase-change material between the first end and the second end. The apparatus also comprises a first input terminal coupled to the heating element, a second input terminal coupled to the heating element, and an output terminal coupled to the second electrode.

In an approach for forming a nonvolatile tunable capacitor device, a first electrode layer is formed distally opposed from a second electrode layer, the first electrode layer configured to make a first electrical connection and the second electrode layer configured to make a second electrical connection. A dielectric layer is posited between the first electrode layer and adjacent to the second electrode layer. A phase change material (PCM) layer is posited between the first electrode layer and the second electrode layer adjacent to the dielectric layer. An energizing component is provided to heat the PCM layer to change a phase of the PCM layer. The energizing component may include a heating element or electrical probe in direct contact with the PCM layer, that when energized is configured to apply heat to the PCM layer. The phase of the PCM layer is changeable between an amorphous phase and a crystalline phase.

A memory device includes a plurality of memory cells, each including a switching device and an information storage device connected to the switching device and having a phase change material, the plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, a decoder circuit determining at least one of the plurality of memory cells to be a selected memory cell, and a program circuit configured to input a programming current to the selected memory cell to perform a programming operation and configured to detect a resistance of the selected memory cell to adjust a magnitude of the programming current.