A MRAM device includes a magnetic tunnel junction containing a reference layer having a fixed magnetization direction, a free layer, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer, a negative-magnetic-anisotropy assist layer having negative magnetic anisotropy that provides an in-plane magnetization within a plane that is perpendicular to the fixed magnetization direction, and a first nonmagnetic spacer layer located between the free layer and the negative-magnetic-anisotropy assist layer.

A storage element includes a layer structure including a storage layer having a direction of magnetization which changes according to information, a magnetization fixed layer having a fixed direction of magnetization, and an intermediate layer disposed therebetween, which intermediate layer contains a nonmagnetic material. The magnetization fixed layer has at least two ferromagnetic layers having a direction of magnetization tilted from a direction perpendicular to a film surface, which are laminated and magnetically coupled interposing a coupling layer therebetween. This configuration may effectively prevent divergence of magnetization reversal time due to directions of magnetization of the storage layer and the magnetization fixed layer being substantially parallel or antiparallel, reduce write errors, and enable writing operation in a short time.

Disclosed is logic device using spin orbit torque. Two magnetic tunnel junctions have mutually opposite magnetization directions. The direction of the current flowing through the non-magnetic metal layer acts as an input, and the resistance states of the magnetic tunnel junctions are determined by the input program currents. Various logic devices are implemented by a method of setting the input program current to a logic high or a logic low.

A buffer layer can be used to smooth the surface roughness of a galvanic contact layer (e.g., of niobium) in an electronic device, the buffer layer being made of a stack of at least four (e.g., six) layers of a face-centered cubic (FCC) crystal structure material, such as copper, the at least four FCC material layers alternating with at least three layers of a body-centered cubic (BCC) crystal structure material, such as niobium, wherein each of the FCC material layers and BCC material layers is between about five and about ten angstroms thick. The buffer layer can provide the smoothing while still maintaining desirable transport properties of a device in which the buffer layer is used, such as a magnetic Josephson junction, and magnetics of an overlying magnetic layer in the device, thereby permitting for improved magnetic Josephson junctions (MJJs) and thus improved superconducting memory arrays and other devices.

An apparatus is provided which comprises: a bit-line; a first word-line; a second word-line; and a source-line; a magnetic junction comprising a free magnet; an interconnect comprising spin orbit material, wherein the interconnect is adjacent to the free magnet of the magnetic junction; and a first device (e.g., a selector device) coupled at one end of the interconnect and to the second word-line; and a second device coupled to the magnetic junction, the first word-line and the source-line.

A memory device, an integrated circuit component including an array of the memory devices, and an integrated device assembly including the integrated circuit component. The memory devices includes a first electrode; a second electrode including an antiferromagnetic (AFM) material; and a memory stack including: a first layer adjacent the second electrode and including a multilayer stack of adjacent layers comprising ferromagnetic materials; a second layer adjacent the first layer; and a third layer adjacent the second layer at one side thereof, and adjacent the first electrode at another side thereof, the second layer between the first layer and the third layer, the third layer including a ferromagnetic material. The memory device may correspond to a magnetic tunnel junction (MTJ) magnetic random access memory bit cell, and the memory stack may correspond to a MTJ device.

Some embodiments relate to a memory device. The memory device includes a magnetoresistive random-access memory (MRAM) cell comprising a magnetic tunnel junction (MTJ). The MTJ device comprises a stack of layers, comprising a bottom electrode disposed over a substrate. A seed layer disposed over the bottom electrode. A buffer layer is disposed between the bottom electrode and the seed layer. The buffer layer prevents diffusion of a diffusive species from the bottom electrode to the seed layer.

Embodiments of the present invention include multiple independent terminals for a plurality of devices in a stack configuration within a semiconductor. In one embodiment, a multi terminal fabrication process comprises: performing an initial pillar layer formation process to create layers of a multi terminal stack; forming a first device in the layers of the multi terminal stack; forming a second device in the layers of the multi terminal stack; and constructing a set of terminals comprising: a first terminal coupled to the first device, a second terminal coupled to the second device; and a third terminal coupled to the first device; wherein at least two terminals in the set of terminals are independent. The third terminal can be coupled to the second device.

Example implementations are concerned with magnetoresistive sensors and with corresponding fabrication methods for magnetoresistive sensors. One example here relates to a magnetoresistive sensor having a layer stack. The layer stack comprises a reference layer having a reference magnetization, which is fixed and has a first magnetic orientation. The layer stack comprises a magnetically free layer. The magnetically free layer has a magnetically free magnetization. The magnetically free magnetization is variable in the presence of an external magnetic field. The magnetically free magnetization has a second magnetic orientation in a ground state. One of the first or the second magnetic orientation is oriented in-plane and the other is oriented out-of-plane. The layer stack comprises a metal multilayer. In this case, either the metal multilayer is arranged adjacent to the magnetically free layer, or the metal multilayer constitutes the magnetically free layer.

A memory structure, i.e., magnetoresistive random access memory (MRAM) structure, is provided that includes a seeding area including at least a tunnel barrier seed layer located beneath a chemical templating layer that is wider than the magnetic tunnel junction (MTJ) structure that is located on the chemical templating layer. Redeposited metallic material is located on at least a sidewall of the tunnel barrier seed layer of the seeding area so as to shunt that area of the structure. The memory structure has reduced resistance with minimal tunnel magnetoresistance (TMR) loss penalty.