A method for producing a printed magnetic functional element, in which a substrate is provided on one surface with at least one contact made of an electrically conductive material. Subsequently, a structure made of a material which has a magnetoresistive effect and is in the form of a paste, a gel, a dispersion or a suspension is printed on or onto the at least one contact and touches the contact directly, and the structure becomes electrically conductive and sensitive to magnetic fields by irradiation with electromagnetic radiation over a time period in the millisecond range.

A first conductive layer is patterned and trimmed to form a sub 30 nm conductive via on a first bottom electrode. The conductive via is encapsulated with a first dielectric layer and planarized to expose a top surface of the conductive via. A second conductive layer is deposited over the first dielectric layer and the conductive via. The second conductive layer is patterned to form a sub 60 nm second conductive layer wherein the conductive via and second conductive layer together form a T-shaped second bottom electrode. MTJ stacks are deposited on the T-shaped second bottom electrode and on the first bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and planarized to expose a top surface of the MTJ stack on the T-shaped second bottom electrode. A top electrode contacts the MTJ stack on the T-shaped second bottom electrode plug.

A spin torque oscillator and a method of making same. The spin torque oscillator is configured to generate microwave electrical oscillations without the use of a magnetic field external thereto, the spin torque oscillator having one of a plurality of input nanopillars and a nanopillar having a plurality of free FM layers.

According to one embodiment, there is provided a spin torque oscillator including an oscillation layer formed of a magnetic material, a spin injection layer formed of a magnetic material and configured to inject a spin into the oscillation layer, and a current confinement layer including an insulating portion formed of an oxide or a nitride and a conductive portion formed of a nonmagnetic metal and penetrating the insulating portion in a direction of stacking. The conductive portion of the current confinement layer is positioned near a central portion of a plane of a device region including the oscillation layer and the spin injection layer.

A method of manufacturing a magnetic random access memory device includes depositing a liner on an intermediate device including an opening in a sacrificial dielectric layer, depositing a conductive metal over the liner and in the opening, removing a portion of the conductive metal while preserving the liner and a thickness of the sacrificial dielectric layer, removing a first portion of the liner by etching, wherein the liner is recessed into the opening, depositing a plurality of metallic tunnel junction layers, forming a hardmask on the plurality of metallic tunnel junction layers, and patterning the metallic tunnel junction layers to form a metallic tunnel junction stack and simultaneously clear a second portion of the liner and a portion the sacrificial dielectric layer.

Embodiments of the present disclosure generally relate to a large field range TMR sensor of magnetic tunnel junctions (MTJs) with a free layer having an intrinsic anisotropy. In one embodiment, a tunnel magnetoresistive (TMR) based magnetic sensor in a Wheatstone configuration includes at least one MTJ. The MTJ includes a free layer having an intrinsic anisotropy produced by deposition at a high oblique angle from normal. Magnetic domain formations within the free layer can be further controlled by a pinned layer canted at an angle to the intrinsic anisotropy of the free layer, by a hard bias element, by shape anisotropy, or combinations thereof.

A method of manufacturing a double magnetic tunnel junction device is provided. The method includes forming a first magnetic tunnel junction stack, forming a spin conducting layer on the first magnetic tunnel junction stack, forming a second magnetic tunnel junction stack on the spin conducting layer, and forming a dielectric spacer layer on surfaces of the spin conducting layer and the second magnetic tunnel junction stack. The second magnetic tunnel junction stack has a width that is less than a width of the first magnetic tunnel junction stack. Also, a width of the spin conducting layer increases in a thickness direction from a first side of the spin conducting layer adjacent to the second magnetic tunnel junction stack to a second side of the spin conducting layer adjacent to the first magnetic tunnel junction stack.

A method for manufacturing a magnetic memory array provides back end of line annealing for associated processing circuitry without causing thermal damage to magnetic memory elements of the magnetic memory array. An array of magnetic memory element pillars is formed on a wafer, and the magnetic memory elements are surrounded by a dielectric isolation material. After the pillars have been formed and surrounded by the dielectric isolation material an annealing process is performed to both anneal the memory element pillars to form a desired grain structure in the memory element pillars and also to perform back end of line thermal processing for circuitry associated with the memory element array.

A ferromagnetic layer is capped with a metallic oxide (or nitride) layer that provides a perpendicular-to-plane magnetic anisotropy to the layer. The surface of the ferromagnetic layer is treated with a plasma to prevent diffusion of oxygen (or nitrogen) into the layer interior. An exemplary metallic oxide layer is formed as a layer of metallic Mg that is plasma treated to reduce its grain size and enhance the diffusivity of oxygen into its interior. Then the plasma treated Mg layer is naturally oxidized and, optionally, is again plasma treated to reduce its thickness and remove the oxygen rich upper surface.

A method for forming a magnetic memory device is disclosed. At least one magnetic tunneling junction (MTJ) stack is formed on the substrate. The MTJ stack comprises a reference layer, a tunnel barrier layer and a free layer. A top electrode layer is formed on the MTJ stack. A patterned sacrificial layer is formed on the top electrode layer. The MTJ stack is then subjected to a MTJ patterning process in a high-density plasma chemical vapor deposition (HDPCVD) chamber, thereby sputtering off the MTJ stack not covered by the patterned sacrificial layer. During the MTJ patterning process, sidewalls of layers or sub-layers of the MTJ stack are simultaneously passivated in the HDPCVD chamber by depositing a sidewall protection layer.