A MTJ stack is deposited on a bottom electrode. A metal hard mask is deposited on the MTJ stack and a dielectric mask is deposited on the metal hard mask. A photoresist pattern is formed on the dielectric mask, having a critical dimension of more than about 65 nm. The dielectric and metal hard masks are etched wherein the photoresist pattern is removed. The dielectric and metal hard masks are trimmed to reduce their critical dimension to 10-60 nm and to reduce sidewall surface roughness. The dielectric and metal hard masks and the MTJ stack are etched wherein the dielectric mask is removed and a MTJ device is formed having a small critical dimension of 10-60 nm, and having further reduced sidewall surface roughness.

A magnetic random access memory (MRAM) array includes a plurality of MRAM cells, each of the MRAM cells including a magnetic tunnel junction (MTJ) stack disposed on a bottom metal via connecting the MTJ stack to a bottom conductive contact in a substrate, a plurality of top conductive contacts, each of the top conductive contacts disposed on a respective one of the MTJ stacks, and a plurality of unitary structures configured as a heat sink/magnetic shield disposed on a vertical portions of each of the MRAM cells, including vertical portions of the bottom metal vias, and under a portion of each of the MTJ stacks.

A method for forming a magnetic memory device is disclosed. At least one magnetic tunneling junction (MTJ) stack is formed on the substrate. The MTJ stack comprises a reference layer, a tunnel barrier layer and a free layer. A top electrode layer is formed on the MTJ stack. A patterned sacrificial layer is formed on the top electrode layer. The MTJ stack is then subjected to a MTJ patterning process in a high-density plasma chemical vapor deposition (HDPCVD) chamber, thereby sputtering off the MTJ stack not covered by the patterned sacrificial layer. During the MTJ patterning process, sidewalls of layers or sub-layers of the MTJ stack are simultaneously passivated in the HDPCVD chamber by depositing a sidewall protection layer.

In a method of manufacturing a semiconductor device, a magnetic random access memory (MRAM) cell structure is formed. The MRAM cell structure includes a bottom electrode, a magnetic tunnel junction (MTJ) stack and a top electrode. A first insulating cover layer is formed over the MRAM cell structure. A second insulating cover layer is formed over the first insulating cover layer. An interlayer dielectric (ILD) layer is formed. A contact opening in the ILD layer is formed, thereby exposing the second insulating cover layer. A part of the second insulating cover layer and a part of the first insulating cover layer are removed, thereby exposing the top electrode. A conductive layer is formed in the opening contacting the top electrode. The second insulating cover layer has an oxygen getter property.

There is provided a method of processing a workpiece for manufacturing a magnetoresistive effect element, the workpiece including a first multilayer film and a second multilayer film, the first multilayer film including a first magnetic layer, a second magnetic layer and a tunnel barrier layer formed between the first magnetic layer and the second magnetic layer, and the second multilayer film constituting a pinning layer in the magnetoresistive effect element. The method includes etching the first multilayer film and the second multilayer film, and heating the workpiece after the etching or during the etching. The heating includes heating the workpiece while adjusting an ambient condition of the workpiece.

A method for fabricating a magnetic tunneling junction (MTJ) structure is described. A first dielectric layer is deposited on a bottom electrode and partially etched through to form a first via opening having straight sidewalls, then etched all the way through to the bottom electrode to form a second via opening having tapered sidewalls. A metal layer is deposited in the second via opening and planarized to the level of the first dielectric layer. The remaining first dielectric layer is removed leaving an electrode plug on the bottom electrode. MTJ stacks are deposited on the electrode plug and on the bottom electrode wherein the MTJ stacks are discontinuous. A second dielectric layer is deposited over the MTJ stacks and polished to expose a top surface of the MTJ stack on the electrode plug. A top electrode layer is deposited to complete the MTJ structure.

A method for generating a closed flux magnetization pattern of a predetermined rotational direction in a magnetic reference layer of a magnetic layer stack is provided. The method includes applying an external magnetic field in a predetermined direction to the magnetic layer stack causing magnetic saturation of the magnetic reference layer and of a pinned layer of the magnetic layer stack; and reducing the external magnetic field to form a first closed flux magnetization pattern in the magnetic reference layer and a second closed flux magnetization pattern in the pinned layer.

A method of manufacturing a double magnetic tunnel junction device is provided. The method includes forming a first magnetic tunnel junction stack, forming a spin conducting layer on the first magnetic tunnel junction stack, forming a second magnetic tunnel junction stack on the spin conducting layer, and forming a dielectric spacer layer on surfaces of the spin conducting layer and the second magnetic tunnel junction stack. The second magnetic tunnel junction stack has a width that is less than a width of the first magnetic tunnel junction stack. Also, a width of the spin conducting layer increases in a thickness direction from a first side of the spin conducting layer adjacent to the second magnetic tunnel junction stack to a second side of the spin conducting layer adjacent to the first magnetic tunnel junction stack.

A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.

A method for fabricating semiconductor device includes the steps of: forming a magnetic tunneling junction (MTJ) stack on a substrate; forming a top electrode on the MTJ stack; performing a first patterning process to remove the MTJ stack along a first direction; and performing a second patterning process to remove the MTJ stack along a second direction to form MTJs on the substrate.