According to one embodiment, when a wafer is placed on a base stand and a first frequency voltage is applied to the base stand, the potential of the wafer is measured, and the first frequency voltage is applied in a pulsed manner to the base stand and a base stand voltage is applied to the base stand, and the amplitude of the base stand voltage is controlled based on the potential of the wafer in synchronization with the timing for a pulse waveform cf the first frequency voltage.

A voltage sensor for a voltage controlled interface of a plasma processing system. The voltage sensor receives a RF signal generated by a pickup device. The RF signal is indicative of a RF voltage provided at a substrate in a plasma chamber. The voltage sensor includes first and second dividers corresponding to first and second channels and having first and second capacitance ratios. The dividers receive the RF signal and respectively generate first and second reduced voltage signals. A first output of the first channel outputs a first output signal based on the first reduced voltage signal and while the RF signal is in a first voltage range. A second output of the second channel outputs a second output signal based on the second reduced voltage signal and while the RF signal is in a second voltage range.

The invention relates to a method for coating a substrate 40, a coating system for carrying out the method, and a coated body. In a first method step 62, the substrate 40 is to pretreated in a ion etching process. In a second method step 64, a first coating layer 56a with a thickness of 0.1 μm to 6 μm is deposited on the substrate 40 by means of a PVD process. In order to achieve a particularly high-quality and durable coating 50, the surface of the first coating layer 56a is treated by means of an ion etching process in a third method step 66, and an additional coating layer 56b with a thickness of 0.1 μm to 6 μm is deposited on the first coating layer 56a by means of a PVD process in a fourth method step 68. The coated body comprises at least two coating layers 56a, 56b, 56c, 56d with a thickness of 0.1 μm to 6 μm on a substrate 40, wherein an interface region formed by ion etching is arranged between the coating layers 56a, 56b, 56c, 56d.

A disclosed plasma processing apparatus includes a chamber, a substrate support, a radio frequency power source, and a bias power source. The radio frequency power source supplies radio frequency power. The bias power source supplies an electric to a bias electrode. An edge ring receives a part of the electric bias or another electric bias. An outer ring extends outside the edge ring in a radial direction and receives a part of the radio frequency power. A level of the radio frequency power is changed in synchronization with the electric bias within each cycle of the electric bias.

A method and apparatus for discharging a residual charge from a substrate support. In one example, a substrate support is provided that includes a body, an electrode disposed in the body, a radiation emitter and a diffuser. The body has one or more holes formed in a workpiece support surface, the workpiece support surface configured to accept a substrate thereon. The electrode is configured to electrostatically hold a substrate to the workpiece support surface. The radiation emitter is disposed in a first hole of the one or more holes formed in the workpiece support surface. The radiation emitter is configured to emit electromagnetic energy out of the first hole. The diffuser is disposed in first hole over the radiation emitter.

The invention relates to an apparatus for reactive ion etching of a substrate, comprising: a plasma etch zone including an etch gas supply and arranged with a plasma generating structure for igniting a plasma and comprising an electrode structure arranged to accelerate the etch plasma toward a substrate portion to have ions impinge on the surface of the substrate; a passivation zone including a cavity provided with a passivation gas supply; said supply arranged for providing a passivation gas flow from the supply to the cavity; the cavity in use being bounded by the injector head and the substrate surface; and a gas purge structure comprising a gas exhaust arranged between said etch zone and passivation zone; the gas purge structure thus forming a spatial division of the etch and passivation zones.

A plasma processing apparatus includes a sample stage on which a sample is placed an inside of the processing chamber; a dielectric membrane forming an upper surface portion of the sample stage; a plurality of film-shaped electrodes which is disposed in the dielectric membrane, to which a DC power from a DC power supply is supplied and in which an electrostatic force for attracting the sample is formed; and a bias electrode (ESC base metal) disposed below the dielectric membrane and supplied with radio frequency power for forming a radio frequency bias potential from a radio frequency power supply during the processing of the sample. The plurality of electrodes includes a first electrode to which a positive polarity is imparted and a second electrode to which a negative polarity is imparted, wherein the first electrode and the second electrode are electrically connected to a corresponding positive electrode terminal and a corresponding negative electrode terminal of the DC power supply through the corresponding low pass filter circuits (LPF).

Some embodiments include methods and systems for wafer biasing in a plasma chamber. A method, for example, may include: generating a first high voltage by a first pulsed voltage source using DC voltages and coupling the first high voltage to a wafer in the plasma chamber via at least one direct connection, the at least one direct connection enabling ion energy control in the plasma chamber; generating one or more of low and medium voltages by a second pulsed voltage source; coupling, capacitively, the one or more of low and medium voltages to the wafer; and pulsing the first high voltage and the one or more of low and medium voltages to achieve a configurable ion energy distribution in the wafer.

Embodiments of the present invention provide an apparatus and methods for depositing a dielectric material using RF bias pulses along with remote plasma source deposition for manufacturing semiconductor devices, particularly for filling openings with high aspect ratios in semiconductor applications. In one embodiment, a method of depositing a dielectric material includes providing a gas mixture into a processing chamber having a substrate disposed therein, forming a remote plasma in a remote plasma source and delivering the remote plasma to an interior processing region defined in the processing chamber, applying a RF bias power to the processing chamber in pulsed mode, and forming a dielectric material in an opening defined in a material layer disposed on the substrate in the presence of the gas mixture and the remote plasma.

A method of processing and passivating an implanted workpiece is disclosed, wherein, after passivation, the fugitive emissions of the workpiece are reduced to acceptably low levels. This may be especially beneficial when phosphorus, arsine, germane or another toxic species is the dopant being implanted into the workpiece. In one embodiment, a sputtering process is performed after the implantation process. This sputtering process is used to sputter the dopant at the surface of the workpiece, effectively lowering the dopant concentration at the top surface of the workpiece. In another embodiment, a chemical etching process is performed to lower the dopant concentration at the top surface. After this sputtering or chemical etching process, a traditional passivation process can be performed.