Methods and apparatus for detecting a shutter disk assembly in a process chamber using a number of sensors. A first, second, and third sensor in a shutter housing for a shutter disk assembly provide indications of a status of the shutter disk assembly. The indications are used in part to determine the operational status of the shutter disk assembly along with process information from a process controller. The operational status is then used to alter a process of the process chamber when necessary.

A process kit ring for use in a plasma processing system is disclosed herein. The process kit ring includes an annular body and one or more hollow inner cavities. The annular body is formed from a plasma resistant material. The annular body has an outer diameter greater than 200 mm. The annular body includes a top surface and a bottom surface. The top surface is configured to face a plasma processing region of a process chamber. The bottom surface is opposite the top surface. The bottom surface is substantially perpendicular to a centerline of the body. The bottom surface is supported at least partially by a pedestal assembly. The one or more hollow inner cavities are formed in the annular body about the centerline. The one or more hollow inner cavities are arranged in a circle within the annular body.

A process kit ring for use in a plasma processing system is disclosed herein. The process kit ring includes an annular body and one or more hollow inner cavities. The annular body is formed from a plasma resistant material. The annular body has an outer diameter greater than 200 mm. The annular body includes a top surface and a bottom surface. The top surface is configured to face a plasma processing region of a process chamber. The bottom surface is opposite the top surface. The bottom surface is substantially perpendicular to a centerline of the body. The bottom surface is supported at least partially by a pedestal assembly. The one or more hollow inner cavities are formed in the annular body about the centerline. The one or more hollow inner cavities are arranged in a circle within the annular body.

Methods and apparatus for processing a substrate are disclosed herein. In some embodiments, a process chamber includes: a chamber body defining an interior volume; a substrate support to support a substrate within the interior volume; a plurality of cathodes coupled to the chamber body and having a corresponding plurality of targets to be sputtered onto the substrate; and a shield rotatably coupled to an upper portion of the chamber body and having at least one hole to expose at least one of the plurality of targets to be sputtered and at least one pocket disposed in a backside of the shield to accommodate and cover at least another one of the plurality of targets not to be sputtered, wherein the shield is configured to rotate about and linearly move along a central axis of the process chamber.

Methods for depositing a dielectric oxide layer atop one or more substrates disposed in or processed through a PVD chamber are provided herein. In some embodiments, such a method includes: sputtering source material from a target assembly onto a first substrate while the source material is at a first erosion state and while providing a first amount of RF power to the target assembly to deposit a dielectric oxide layer onto a first substrate having a desired resistance-area; and subsequently sputtering source material from the target assembly onto a second substrate while the source material is at a second erosion state and while providing a second amount of RF power to the target assembly, wherein the second amount of RF power is lower than the first amount of RF power by a predetermined amount calculated to maintain the desired resistance-area.

Bulk acoustic wave resonator structures include a bulk layer with inclined c-axis hexagonal crystal structure piezoelectric material supported by a substrate. The bulk layer may be prepared without first depositing a seed layer on the substrate. The bulk material layer has a c-axis tilt of about 32 degrees or greater. The bulk material layer may exhibit a ratio of shear coupling to longitudinal coupling of 1.25 or greater during excitation. A method for preparing a crystalline bulk layer having a c-axis tilt includes depositing a bulk material layer directly onto a substrate at an off-normal incidence. The deposition conditions may include a pressure of less than 5 mTorr and a deposition angle of about 35 degrees to about 85 degrees.

An apparatus of fabricating a semiconductor device may include a chamber including a housing and a slit valve used to open or close a portion of the housing, a heater chuck provided in a lower region of the housing and used to heat a substrate, a target provided over the heater chuck, a plasma electrode provided in an upper region of the housing and used to generate plasma on the target, a heat-dissipation shield surrounding the inner wall of the housing between the plasma electrode and the heater chuck, and an edge heating structure provided between the heat-dissipation shield and the inner wall of the housing and configured to heat the heat-dissipation shield and an edge region of the substrate and to reduce a difference in temperature between center and edge regions of the substrate.

Disclosed are a collimator, a fabrication apparatus including the same, and a method of fabricating a semiconductor device using the same. The fabrication apparatus may include a chamber, a heater chuck provided in a lower region of the chamber and configured to heat a substrate, a target provided over the heater chuck, the target containing a source for a thin layer to be deposited on the substrate, a plasma electrode provided in an upper region of the chamber and configured to generate plasma near the target and thereby to produce particles from the source, and a collimator provided between the heater chuck and the target.

Methods and apparatus for physical vapor deposition (PVD) are provided herein. In some embodiments, a method for PVD includes providing a first stream of a first material from a first PVD source towards a surface of a substrate at a first non-perpendicular angle to the plane of the substrate surface and rotating and linearly scanning the substrate through the stream of first material to deposit the first material on all features formed on the substrate, providing a second stream of an ionized dopant species from a dopant source towards the surface of the substrate at a second non-perpendicular angle to the plane of the substrate surface, and implanting the ionized dopant species in the first material deposited only on a top portion and a portion of the first and second sidewalls of all the features on the substrate by rotating and linearly scanning the substrate via the substrate support.

Plasma etch-cleaning of substrates is performed by means of a plasma discharge arrangement comprising an electron source cathode (5) and an anode arrangement (7). The anode arrangement (7) comprises on one hand an anode electrode (9) and on the other hand and electrically isolated therefrom a confinement (11). The confinement (11) has an opening (13) directed towards an area (S) of a substrate (21) to be cleaned. The electron source cathode (5) and the anode electrode (9) are electrically supplied by a supply circuit with a supply source (19). The circuit is operated electrically floating.