H01L21/02046

Cleaning method

Implementations of the present disclosure generally relate to methods and apparatuses for epitaxial deposition on substrate surfaces. More particularly, implementations of the present disclosure generally relate to methods and apparatuses for surface preparation prior to epitaxial deposition. In one implementation, a method of processing a substrate is provided. The method comprises etching a surface of a silicon-containing substrate by use of a plasma etch process to form an etched surface of the silicon-containing substrate and forming an epitaxial layer on the etched surface of the silicon-containing substrate. The plasma etch process comprises flowing an etchant gas mixture comprising a fluorine-containing precursor and a hydrogen-containing precursor into a substrate-processing region of a first processing chamber and forming a plasma from the etchant gas mixture flowed into the substrate-processing region.

Method for Dry Etching Compound Materials
20200381261 · 2020-12-03 ·

A method for treating a substrate includes receiving a substrate in a vacuum process chamber. The substrate includes a III-V film layer disposed on the substrate. The III-V film layer includes an exposed surface, an interior portion underlying the exposed surface, and one or more of the following: Al, Ga, In, N, P, As, Sb, Si, or Ge. The method further includes altering the chemical composition of the exposed surface and a fraction of the interior portion of the III-V film layer to form an altered portion of the III-V film layer using a hydrogen-based plasma treatment, removing the altered portion of the III-V film layer using a chlorine-based plasma treatment, and repeating the altering and removing of the III-V film layer until a predetermined amount of the III-V film layer is removed from the substrate.

OPTICAL IMAGE CAPTURING SYSTEM, IMAGE CAPTURING DEVICE AND ELECTRONIC DEVICE
20200344391 · 2020-10-29 ·

An optical image capturing system comprising, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The first lens element with negative refractive power has a concave image-side surface. The second lens element, the third lens element and the fourth lens element have refractive power. The fifth lens element has refractive power. The sixth lens element with refractive power has an image-side surface being concave in a paraxial region and includes at least one convex shape in an off-axial region, wherein the surfaces thereof are aspheric. The seventh lens element refractive power has an image-side surface being concave in a paraxial region and includes at least one convex shape in an off-axial region, wherein the surfaces thereof are aspheric.

Manufacturing method for IGZO active layer and oxide thin film transistor

A manufacturing method for an IGZO active layer is disclosed. The method comprises steps of: after depositing a first metal layer and a gate insulation layer on a substrate, depositing an IGZO material on the gate insulation layer, and forming an IGZO film; and performing a plasma cleaning treatment on a surface of the IGZO film by using an argon gas or a helium gas to adjust element contents on the surface of the IGZO film, and forming an IGZO active layer. The present invention also correspondingly discloses a manufacturing method for an oxide thin film transistor. By implementing the embodiments of the present invention, the elements on the film surface of the IGZO active layer can be adjusted to improve electrical properties.

Optical image capturing system, image capturing device and electronic device

An optical image capturing system comprising, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element and a seventh lens element. The first lens element with negative refractive power has a concave image-side surface. The second lens element, the third lens element and the fourth lens element have refractive power. The fifth lens element has refractive power. The sixth lens element with refractive power has an image-side surface being concave in a paraxial region and includes at least one convex shape in an off-axial region, wherein the surfaces thereof are aspheric. The seventh lens element with refractive power has an image-side surface being concave in a paraxial region and includes at least one convex shape in an off-axial region, wherein the surfaces thereof are aspheric.

APPARATUS AND METHOD FOR WAFER BONDING
20200258743 · 2020-08-13 ·

An apparatus for wafer bonding includes a transfer module and a plasma module. The transfer module is configured to transfer a semiconductor wafer. The plasma module is configured to apply a first type of plasma to perform a reduction operation upon a surface of the semiconductor wafer at a temperature within a predetermined temperature range to convert metal oxides on the surface of the semiconductor wafer to metal, and apply a second type of plasma to perform a plasma operation upon the surface of the semiconductor wafer at a room temperature outside the predetermined temperature range to activate a surface of the semiconductor wafer.

Wafer processing apparatus and method
10734253 · 2020-08-04 · ·

Disclosed is a wafer processing apparatus and method. The wafer processing apparatus comprises a chamber, which is a sealed structure having an openable baffle, and is internally provided with an immersion tank having a waste liquid discharge port; a vacuum system for adjusting and maintaining a pressure inside the chamber; a gas supply system comprising an inert gas supply unit and an organic solvent vapor supply unit respectively supplying an inert gas and an organic solvent vapor to the chamber; a temperature control system for adjusting the temperature inside the chamber. According to the present invention, the problems present in existing wafer drying modes can be solved, and in particular, the present invention is well adaptable to a trend of integrated circuit devices developed from a two-dimensional planar structure to a three-dimensional structure in morphology and having more and more increased density.

Combination Vacuum And Over-Pressure Process Chamber And Methods Related Thereto
20200234986 · 2020-07-23 ·

A process chamber system adapted for both vacuum process steps and steps at pressures higher than atmospheric pressure. The chamber door may utilize a double door seal which allows for high vacuum in the gap between the seals such that the sealing force provided by the high vacuum in the seal gap is higher than the opposing forces due to the pressure inside the chamber and the weight of the components.

SUBNANOMETER-LEVEL LIGHT-BASED SUBSTRATE CLEANING MECHANISM
20200219722 · 2020-07-09 ·

Various embodiments comprise apparatuses and related methods for cleaning a substrate. In one embodiment, an apparatus includes a substrate holder to hold and rotate the substrate at various speeds. An optional inner shield and an optional outer shield, when in a closed position, surround the substrate holder during operation of the apparatus. Each of the inner shield and the outer shield can operate independently in at least one of rotational speed and direction from the other shield. At least one of a front-side laser and a back-side laser are arranged to clean one or both sides of the substrate and edges of the substrate substantially concurrently or independently by impinging a light onto at least one surface of the substrate. A gas flow, combined with a high rotational-speed of the shields and substrate, assists in removing effluents from the substrate. Additional apparatuses and methods of forming the apparatuses are disclosed.

METHOD FOR FABRICATING A MONOCRYSTALLINE STRUCTURE

A substrate is provided with a monocrystalline silicon-germanium layer with a first surface covered by a protective oxide obtained by wet process and having a degradation temperature. The protective oxide is transformed into fluorinated salt which is then eliminated. The substrate is placed in a processing chamber at a lower temperature than the degradation temperature and is subjected to a temperature ramp up to a higher temperature than the degradation temperature. The first surface is annealed in a hydrogen atmosphere devoid of silicon, germanium and precursors of the materials forming the target layer. When the temperature ramp is applied, a silicon precursor is inserted in the processing chamber between a loading temperature and the degradation temperature to deposit a monocrystalline buffer layer. A mono-crystalline target layer is deposited by chemical vapour deposition.