Methods and film stacks for extreme ultraviolet (EUV) lithography are described. The film stack comprises a substrate with a hard mask, bottom layer, middle layer and photoresist. Etching of the photoresist is highly selective to the middle layer and a modification of the middle layer allows for a highly selective etch relative to the bottom layer.

A method of descumming a dielectric layer is provided. In an embodiment the dielectric layer is deposited over a substrate, and a photoresist is applied, exposed, and developed after the photoresist has been applied. Once the pattern of the photoresist is transferred to the underlying dielectric layer, a descumming process is performed, wherein the descumming process utilizes a mixture of a carbon-containing precursor, a descumming precursor, and a carrier gas. The mixture is ignited into a treatment plasma, and the treatment plasma is applied to the dielectric layer in order to descum the dielectric layer.

A method for forming a thermal oxide film on a semiconductor substrate, including: a correlation acquisition step of providing a plurality of semiconductor substrates; a substrate cleaning step of cleaning a semiconductor substrate; a thermal oxide film thickness estimation step of determining a constitution of a chemical oxide film formed on the semiconductor substrate by the cleaning in the substrate cleaning step and, based on the correlation, estimating a thickness of a thermal oxide film on a hypothesis that the semiconductor substrate has been subjected to a thermal oxidization treatment conditions in the correlation acquisition step; a thermal oxidization treatment condition determination step of determining thermal oxidization treatment conditions based on the thermal oxidization treatment conditions in the correlation acquisition step so that the thermal oxide film is a predetermined thickness; and a thermal oxide film formation step of forming a thermal oxide film on the semiconductor substrate.

Embodiments of the present disclosure generally relate to methods and systems for cleaning a surface of a substrate. In an embodiment, a method of processing a substrate is provided. The method includes introducing a substrate to a processing volume of a processing chamber by positioning the substrate on a substrate support. The method further includes flowing a first process gas into the processing volume, the first process gas comprising HF, flowing a second process gas into the processing volume, the second process gas comprising pyridine, pyrrole, aniline, or a combination thereof, and exposing the substrate to the first process gas and the second process gas to remove oxide from the substrate under oxide removal conditions. In another embodiment, a system is provided that includes a processing chamber to process a substrate, and a controller to cause a processing method to be performed in the processing chamber.

A cleaning solution includes a solvent having Hansen solubility parameters: 25>δ.sub.d>13, 25>δ.sub.p>3, 30>δ.sub.h>4; an acid having an acid dissociation constant pKa: −11<pKa<4, or a base having pKa of 40>pKa>9.5; and a surfactant. The surfactant is an ionic or non-ionic surfactant, selected from

##STR00001##

R is substituted or unsubstituted aliphatic, alicyclic, or aromatic group, and non-ionic surfactant has A-X or A-X-A-X structure, where A is unsubstituted or substituted with oxygen or halogen, branched or unbranched, cyclic or non-cyclic, saturated C2-C100 aliphatic or aromatic group, X includes polar functional groups selected from —OH, ═O, —S—, —P—, —P(O.sub.2), —C(═O)SH, —C(═O)OH, —C(═O)OR—, —O—, —N—, —C(═O)NH, —SO.sub.2OH, —SO.sub.2SH, —SOH, —SO.sub.2—, —CO—, —CN—, —SO—, —CON—, —NH—, —SO.sub.3NH—, and SO.sub.2NH.

A cleaning agent is provided for a semiconductor substrate superior in corrosion resistance of a tungsten wiring or a tungsten alloy wiring, and superior in removal property of polishing fines (particle) such as silica or alumina, remaining at surface of the semiconductor substrate, in particular, at surface of a silicon oxide film such as a TEOS film, after a chemical mechanical polishing process; and a method for processing a semiconductor substrate surface. A cleaning agent for a semiconductor substrate is to be used in a post process of a chemical mechanical polishing process of the semiconductor substrate having a tungsten wiring or a tungsten alloy wiring, and a silicon oxide film, comprising (A) a phosphonic acid-based chelating agent, (B) a primary or secondary monoamine having at least one alkyl group or hydroxyalkyl group in a molecule and (C) water, wherein a pH is over 6 and below 7.

Proposed are a processing solution for reducing the incidence of pattern collapse and the number of defects in a photoresist pattern including polyhydroxystyrene using extreme ultraviolet rays as an exposure source, and a method of forming a pattern using the same. The processing solution for reducing the incidence of photoresist pattern collapse and the number of defects includes 0.0001 to 1 wt % of an alkaline material, 0.0001 to 1 wt % of an anionic surfactant, and 98 to 99.9998 wt % of water.

Disclosed is a method of forming a fine silicon pattern with a high aspect ratio for fabrication of a semiconductor device. The method includes a cleaning process of removing organic residue or reside originating in fumes using a cleaning solution, thereby enabling formation of a desired pattern while preventing the pattern from being lifted. Thus, the present disclosure enables formation of a fine pattern by using a novel cleaning method.

A cleaning liquid which includes 3-alkoxy-3-methyl-1-butanol represented by the following general formula (1); at least one of diethylene glycol monomethyl ether and triethylene glycol monomethyl ether; and quaternary ammonium hydroxide:

##STR00001##

in which R.sup.1 represents an alkyl group having 1 to 5 carbon atoms.

The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 Å.