A vapor phase epitaxial growth device comprises a reactor vessel and a wafer holder arranged within the reactor vessel. The wafer holder includes a wafer holding surface configured to hold a wafer with a wafer surface oriented substantially vertically downward. The device comprises a first material gas supply pipe configured to supply a first material gas and arranged below the wafer holding surface. The device comprises a second material gas supply pipe configured to supply a second material gas and arranged below the wafer holding surface. The device comprises a gas exhaust pipe configured to exhaust gases and arranged below the wafer holding surface. A distance between the gas exhaust pipe and an axis line passing through a center of the wafer holding surface is greater than distances between the axis line and each of the first material gas supply pipe and the second material gas supply pipe.

A semiconductor device includes: a substrate having a first region and a second region; a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; a first bump on the first region; a first doped layer on the first fin-shaped structure and the bump; and a gate structure covering the bump.

A MEMS microphone includes a substrate having a cavity, a back plate provided over the substrate and having a plurality of acoustic holes, a diaphragm disposed between the substrate and the back plate, and spaced apart from the substrate and the back plate, a strut located at outer side of the diaphragm, having a lower surface in contact with an upper surface of the substrate and being integrally formed with the upper insulation layer to support the upper insulation layer to space the upper insulation layer from the diaphragm, and a bending prevention member provided on an upper surface of the back plate for preventing the back plate from being bent.

A method for treating a micro electro-mechanical system (MEMS) component is disclosed. In one example, the method includes the steps of providing a first wafer, treating the first wafer to form cavities and at least an oxide layer on a top surface of the first wafer using a first chemical vapor deposition (CVD) process, providing a second wafer, bonding the second wafer on a top surface of the at least one oxide layer, treating the second wafer to form a first plurality of structures, depositing a layer of Self-Assembling Monolayer (SAM) to a surface of the MEMS component using a second CVD process.

In an embodiment, a system includes: a chamber; and a magnetic assembly contained within the chamber. The magnetic assembly comprises: an inner magnetic portion comprising first magnets; and an outer magnetic portion comprising second magnets. At least two adjacent magnets, of either the first magnets or the second magnets, have different vertical displacements, and the magnetic assembly is configured to rotate around an axis to generate an electromagnetic field that moves ions toward a target region within the chamber.

Disclosed is a method. The method includes forming a trench structure with at least one first trench in a first section of a semiconductor body; forming a second trench that is wider than the first trench in a second section of the semiconductor body; and forming a semiconductor layer on a surface of the semiconductor body in the first section and the second section and in the at least one first trench and the second trench such that the semiconductor layer has a substantially planar surface above the first section and a residual trench remains above the second section. Forming the semiconductor layer includes forming a first epitaxial layer in a first epitaxial growth process and a second epitaxial layer on top of the first epitaxial layer in a second epitaxial growth process.

A method is provided for patterning a target layer, the method comprising: (i) forming above the target layer a line mask and a mandrel mask, wherein forming the line mask comprises forming parallel material lines extending in a longitudinal direction, wherein forming the mandrel mask comprises forming a mandrel mask having sidewalls including at least a first sidewall extending transverse to a plurality of the material lines; (ii) forming on the sidewalls of the mandrel mask a sidewall spacer including a first sidewall spacer portion extending along the first sidewall; (iii) partially removing the sidewall spacer such that a remainder of the sidewall spacer comprises at least a part of the first sidewall spacer portion; and (iv) subsequent to removing the mandrel mask, transferring into the target layer a pattern defined by the line mask and the remainder of the sidewall spacer.

The disclosure relates to a glass-based antenna array package. In an aspect, such a glass-based antenna array package includes a single glass substrate layer, one or more antennas attached to a first side of the glass substrate layer, at least one semiconductor device attached to a second side of the glass substrate layer, and a first photoimageable dielectric layer adhered to the second side of the glass substrate layer and encapsulating the at least one semiconductor device. A method of manufacturing the same is also disclosed.

Different portions of a continuous loop of semiconductor material are electrically isolated from one another. In some embodiments, the end of the loop is electrically isolated from mid-portions of the loop. In some embodiments, loops of semiconductor material, having two legs connected together at their ends, are formed by a pitch multiplication process in which loops of spacers are formed on sidewalls of mandrels. The mandrels are removed and a block of masking material is overlaid on at least one end of the spacer loops. In some embodiments, the blocks of masking material overlay each end of the spacer loops. The pattern defined by the spacers and the blocks are transferred to a layer of semiconductor material. The blocks electrically connect together all the loops. A select gate is formed along each leg of the loops. The blocks serve as sources/drains. The select gates are biased in the off state to prevent current flow from the mid-portion of the loop's legs to the blocks, thereby electrically isolating the mid-portions from the ends of the loops and also electrically isolating different legs of a loop from each other.

Disclosed are an electronic device and the manufacturing method thereof, a manufacturing method of a thin film transistor, and an array substrate and manufacturing method thereof. The manufacturing method of an electronic device includes: forming a metallic structure on a base substrate; forming an oxygen-free insulating layer on the metallic structure and the base substrate; and forming an insulating protective layer on the oxygen-free insulating layer. The manufacturing method of the electronic device protects a metallic structure by forming an oxygen-free insulating layer, not containing oxygen elements, on the metallic structure, and hence prevents the metallic structure from being oxidized.