Patent classifications
H01L21/02612
Semiconductor device including an active pattern having a lower pattern and a pair of channel patterns disposed thereon and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming a semiconductor layer on a substrate, the semiconductor layer including a first semiconductor material and a second semiconductor material, patterning the semiconductor layer to form a preliminary active pattern, oxidizing at least two sidewalls of the preliminary active pattern to form an oxide layer on each of the at least two sidewalls of the preliminary active pattern, at least two upper patterns and a semiconductor pattern being formed in the preliminary active pattern when the oxide layers are formed, the semiconductor pattern being disposed between the at least two upper patterns, and removing the semiconductor pattern to form an active pattern, the active pattern including the at least two upper patterns. A concentration of the second semiconductor material in each of the at least two upper patterns is higher than a concentration of the second semiconductor material in the semiconductor pattern.
METHOD FOR FABRICATING ULTRA-THIN GRAPHITE FILM ON SILICON CARBIDE SUBSTRATE
A method for fabricating an ultra-thin graphite film on a silicon carbide substrate includes the steps of: (A) providing a polyamic acid solution and a siloxane-containing coupling agent for polymerizing under an inert gas atmosphere to form a siloxane-coupling-group-containing polyamic acid solution; (B) performing a curing process after applying the siloxane-coupling-group-containing polyamic acid solution to a silicon carbide substrate; (C) placing the silicon carbide substrate in a graphite crucible before placing the graphite crucible in a reaction furnace to perform a carbonization process under an inert gas atmosphere; (D) subjecting the silicon carbide substrate to a graphitization process to obtain a graphite film, thereby make it possible to fabricate an ultra-thin graphite film of high-quality on the surface of silicon carbide in a lower graphitization temperature range.
Solid phase epitaxy of 3C-SiC on Si(001)
A 3CSiC buffer layer on Si(001) comprising a porous buffer layer of 3CSiC on a Si(001) substrate, wherein the porous buffer layer is produced through a solid state reaction, and wherein an amorphous carbon layer on the Si(001) substrate is deposited by magnetron sputtering of a C target at room temperature at a rate of 0.8 nm/min.
GRAPHENE AND HEXAGONAL BORON NITRIDE PLANES AND ASSOCIATED METHODS
Graphene layers made of primarily sp2 bonded atoms and associated methods are disclosed. In one aspect, for example, a method of forming a graphite film can include heating a solid substrate under vacuum to a solubilizing temperature that is less than a melting point of the solid substrate, solubilizing carbon atoms from a graphite source into the heated solid substrate, and cooling the heated solid substrate at a rate sufficient to form a graphite film from the solubilized carbon atoms on at least one surface of the solid substrate. The graphite film is formed to be substantially free of lattice defects.
Gate Stack Designs for Analog and Logic Devices in Dual Channel Si/SiGe CMOS
Improved gate stack designs for Si and SiGe dual channel devices are provided. In one aspect, a method for forming a dual channel device includes: forming fins on a substrate, the fins including Si fins in combination with SiGe fins as dual channels of an analog device and a logic device, with the analog device and the logic device each having a Si fin and a SiGe fin; forming a silicon germanium oxide (SiGeOx) layer on the SiGe fins; annealing the SiGeOx layer to form a Si-rich layer on the SiGe fins via a reaction between SiGeOx and SiGe; and forming metal gates over the Si fins and over the Si-rich layer on the SiGe fins. A dual channel device is also provided.
SEMICONDUCTOR LAYER, OSCILLATION ELEMENT, AND SEMICONDUCTOR LAYER MANUFACTURING METHOD
A semiconductor layer of the present invention is a semiconductor layer including: a pn junction at which an n-type semiconductor (Al.sub.2O.sub.3 (n-type)) and a p-type semiconductor (Al.sub.2O.sub.3 (p-type)) are joined, the n-type semiconductor (Al.sub.2O.sub.3 (n-type)) having a donor level that is formed by causing an aluminum oxide film (Al.sub.2O.sub.3) to excessively contain aluminum (Al), the p-type semiconductor (Al.sub.2O.sub.3 (p-type)) having an acceptor level that is formed by causing an aluminum oxide film (Al.sub.2O.sub.3) to excessively contain oxygen (O).
Lift printing of multi-composition material structures
A method for material deposition includes providing a transparent donor substrate (56, 60) having opposing first and second surfaces and multiple donor films (62, 64) including different, respective materials on the second surface. The donor substrate is positioned in proximity to an acceptor substrate (41), with the second surface facing toward the acceptor substrate. Pulses of laser radiation are directed to pass through the first surface of the donor substrate and impinge on the donor films so as to induce ejection of molten droplets containing a bulk mixture of the different materials from the donor films onto the acceptor substrate.
VOLTAGE TUNABLE SOLAR BLINDNESS IN TFS GROWN EG/SIC SCHOTTKY CONTACT BIPOLAR PHOTOTRANSISTORS
A voltage tunable solar-blind UV detector using a EG/SiC heterojunction based Schottky emitter bipolar phototransistor with EG grown on p-SiC epi-layer using a chemically accelerated selective etching process of Si using TFS precursor.
Semiconductor structure with a silicon germanium alloy fin and silicon germanium alloy pad structure
A semiconductor structure is provided that includes a silicon germanium alloy fin having a second germanium content located on a first portion of a substrate. The structure further includes a laterally graded silicon germanium alloy material portion located on a second portion of the substrate. The laterally graded silicon germanium alloy material portion is spaced apart from the silicon germanium alloy fin and has end portions having the second germanium content and a middle portion located between the end portions that has a first germanium content that is less than the second germanium content.
Method of fabricating device including two-dimensional material
A method of fabricating a device including a two-dimensional (2D) material includes forming an amorphous transition metal oxide structure on a substrate and replacing the amorphous transition metal oxide structure by a transition metal dichalcogenide structure. The transition metal dichalcogenide structure includes atomic layers, that are substantially parallel to a surface of the transition metal dichalcogenide structure.