A tunable amorphous silicon layer for use with multilayer patterning stacks can be used to maximize transparency and minimize reflections so as to improve overlay metrology contrast. By increasing the hydrogen content in the amorphous silicon layer, the extinction coefficient (k) value and the refractive index (n) value can be decreased to desired values. Methods for improving overlay metrology contrast with the tunable amorphous silicon layer are disclosed.

A plasma treatment is utilized prior to a conventional lift-off process to increase the hydrophilic characteristics of the surface of the sacrificial metal over the photoresist and minimize its ability to redeposit on the wafer surface. Highly-energized atoms (or molecules) in the plasma interact with the surface atoms of the metal, creating a temporary hydrophilic condition at the surface. This increased wettability of the metal layer surface thus minimizes the probability that subsequently removed thin film metal will be able to bond with the wafer surface. The metal layer may comprise a typical stack of Ti/Pt/Au, and the plasma treatment may use an O.sub.2-based plasma or a CF.sub.4-based plasma, among others.

A technique relates to a semiconductor device. An emitter electrode and a collector electrode are formed in a dielectric layer such that a nanogap separates the emitter electrode and the collector electrode, a portion of the emitter electrode including layers. A channel is formed in the dielectric layer so as to traverse the nanogap. A top layer is formed over the channel so as to cover the channel and the nanogap without filling in the channel and the nanogap, thereby forming a vacuum channel transistor structure.

Embodiments disclosed herein include a lithographic patterning system and methods of using such a system to form a microelectronic device. The lithographic patterning system includes an actinic radiation source, a stage having a surface for supporting a substrate with a resist layer, and a prism with a first surface over the stage, where the first surface has a masked layer and is substantially parallel to the surface of the stage. The prism may have a second surface that is substantially parallel to the first surface. The first and second surfaces are flat surfaces. The prism is a monolithic prism-mask, where an optical path passes through the system and exits the first surface of the prism through the mask layer. The system may include a layer disposed between the mask and resist layers. The mask layer of the prism may pattern the resist layer without an isolated mask layer.

The present invention relates a coating composition comprising a solvent, metal oxide nanoparticles dispersed in this solvent, a high carbon polymer dissolved in this solvent, where the high carbon polymer comprises a repeat unit of structure (1), a hydroxybiphenyl repeat unit of structure (2) and an moiety containing a fused aromatic containing moiety of structure (3) wherein R.sub.1 and R.sub.2 are independently selected from the group consisting of hydrogen, an alkyl and a substituted alkyl, Ar is an unsubstituted or substituted fused aromatic ring and X.sub.1 is an alkylene spacer, or a direct valence bound. The invention also relates to a processes where this composition is used in lithographic applications as a patterned hard mask either through and inverse tone hard mask pattern transfer process or a conventional mask pattern process using a photoresist, to pattern the hard mask and a hard mask to pattern a semiconductor substrate with a plasma. The invention, also further comprises a process in which a composition comprised of a metal oxide and metal oxide nanoparticle dispersed in a solvent is used to coat a metal hard mask to which is used in a standard hard mask pattern transfer process to pattern a semiconductor substrate.

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A plasma treatment is utilized prior to a conventional lift-off process to increase the hydrophilic characteristics of the surface of the sacrificial metal over the photoresist and minimize its ability to redeposit on the wafer surface. Highly-energized atoms (or molecules) in the plasma interact with the surface atoms of the metal, creating a temporary hydrophilic condition at the surface. This increased wettability of the metal layer surface thus minimizes the probability that subsequently removed thin film metal will be able to bond with the wafer surface. The metal layer may comprise a typical stack of Ti/Pt/Au, and the plasma treatment may use an O.sub.2-based plasma or a CF.sub.4-based plasma, among others.

The present disclosure advances the art by providing a method and system for forming electronic devices. In particular, and by example only, methods are described for forming devices for harvesting energy in the terahertz frequency range on flexible substrates, wherein the methods provide favorable accuracy in registration of the various device elements and facilitate low-cost R2R manufacturing.

A method of manufacturing a semiconductor device according to the present invention includes a step of forming an opening portion in a resist coated on a substrate, a step of coating a thermally-shrinking shrink agent on the resist to fill the opening portion with the shrink agent, a shrinking step of heating and thermally shrinking the shrink agent to reduce a width of the opening portion, a removing step of removing the shrink agent after the shrinking step, a step of forming a metal layer on the resist and in the opening portion after the removing step and a step of removing a portion of the metal layer above the resist and the resist, wherein in the shrinking step, a side surface of the resist forming the opening portion forms a curved surface protruding toward a center portion of the opening portion.

A method of making nanoscale belts including: providing a semiconductor thin film, placing stripe masks on the semiconductor thin film, the thickness of the stripe masks is H, the spacing distance between adjacent stripe masks is L; depositing a first thin film layer along a first direction, the thickness of the first thin film layer is D, a first angle between first direction and a direction along thickness of the stripe masks is .sub.1, .sub.1<tan.sup.1(L/H); depositing a second thin film layer along a second direction, a second angle between second direction and the direction along thickness of the stripe masks is .sub.2, .sub.2<tan.sup.1[L/(H+D)], 0<LH tan .sub.1(H+D)tan .sub.2<10 nm, the first thin film layer partly overlaps with the second thin film layer to form an overlapping structure; dry etching the first thin film layer and the second thin film layer to obtain a nanoscale microstructure; etching the semiconductor thin film.

According to one embodiment, a method for manufacturing a device includes a first process, a second process, a third process, and a fourth process. The first process includes providing a structure body at a first surface of a substrate. The substrate is light-transmissive and has a second surface. A light transmissivity of the structure body is lower than a light transmissivity of the substrate. The second process includes providing a negative-type photoresist at the second surface. The third process includes irradiating the substrate with light to expose a portion of the photoresist. The light is irradiated in a first direction from the first surface toward the second surface. The light passes through the substrate. The fourth process includes developing the photoresist to remain the portion of the photoresist in a state of being adhered to the second surface and to remove other portion of the photoresist.