A method for depositing, patterning and removing a layer of aluminum oxide as a masking material layer for performing a deep, high-aspect ratio etches into a substrate. The method comprising deposing a photoresist onto the substrate, performing lithography processing on the photoresist, developing the photoresist to pattern the photoresist into a mask design, depositing a thin-film layer of aluminum oxide; immersing the substrate into a solution to lift-off the aluminum oxide in regions where the aluminum oxide is deposited on top of the photoresist thereby leaving the patterned aluminum oxide layer on the substrate where no photoresist was present, performing deep reactive ion etching on the substrate wherein the hard masking material layer composed of aluminum oxide functions as a protective masking layer on the substrate to prevent etching from occurring where the aluminum oxide is present, and removing the aluminum oxide masking layer by immersion in a solution.

A semiconductor structure includes a substrate; a spacer protruding from the substrate and surrounding a cavity; and spin-on glass filling a portion of the cavity.

A method of making a thin film transistor, the method includes: providing a semiconductor layer; arranging a first photoresist layer, a nanowire structure, a second photoresist layer on the semiconductor layer, wherein the nanowire structure includes a single nanowire; forming one opening in the first photoresist layer and the second photoresist layer to form an exposed surface, wherein a part of the nanowire is exposed and suspended in the opening; depositing a conductive film layer on the exposed surface using the nanowire structure as a mask, wherein the conductive film layer defines a nano-scaled channel, and the conductive film layer is divided into two regions, one region is used as a source electrode, and the other region is used as a drain electrode; forming an insulating layer on the semiconductor layer to cover the source electrode and the drain electrode, and locating a gate electrode on the insulating layer.

A process of forming a field effect transistor is disclosed. The process includes steps of depositing a first silicon nitride (SiN) film on a semiconductor layer by a low pressure chemical vapor deposition (LPCVD) technique; depositing a second SiN film on the first SiN film by plasma assisted chemical vapor deposition (p-CVD) technique; preparing a photoresist mask on the second SiN film, the photoresist mask having an opening in a position corresponding to the gate electrode; dry-etching the second SiN film and the first SiN film continuously in a portion of the opening in the photoresist mask to form an opening in the first SiN film and an opening in the second SiN film, the openings in the first and second SiN films exposing the semiconductor layer; and filling at least the opening in the first SiN film by the gate electrode. A feature of the process is that the opening in the first SiN film has an inclined side against the semiconductor layer and gradually widens from the semiconductor layer.

A method for manufacturing a TFT (Thin-Film Transistor) substrate is proposed. The method includes utilizing a first photomask process to form a buffer layer, a data line, a source electrode, a first scan line, a second scan line, and a gate electrode on a substrate; utilizing a second photomask process to form a first insulation layer, a second insulation layer, a first semiconductor layer, and a second semiconductor layer on the substrate; and utilizing a third photomask process to form a first conductor layer, an electrical connection portion, and a drain electrode on the substrate.

The present application discloses a method of fabricating a polycrystalline silicon thin film transistor, the method including forming an amorphous silicon layer on a base substrate having a pattern corresponding to a polycrystalline silicon active layer of the thin film transistor; the amorphous silicon layer having a first region corresponding to a source electrode and drain electrode contact region in the polycrystalline silicon active layer and a second region corresponding to a channel region in the polycrystalline silicon active layer; forming a first dopant layer on a side of the second region distal to the base substrate; forming a second dopant layer on a side of the first region distal to the base substrate; and crystallizing the amorphous silicon layer, the first dopant layer, and the second dopant layer to form the polycrystalline silicon active layer, the polycrystalline silicon active layer being doped with a dopant of the first dopant layer in the second region and doped with a dopant of the second dopant layer in the first region during the step of crystallizing the amorphous silicon layer.

A tunable amorphous silicon layer for use with multilayer patterning stacks can be used to maximize transparency and minimize reflections so as to improve overlay metrology contrast. By increasing the hydrogen content in the amorphous silicon layer, the extinction coefficient (k) value and the refractive index (n) value can be decreased to desired values. Methods for improving overlay metrology contrast with the tunable amorphous silicon layer are disclosed.

Provided is a method of producing a metal mesh type transparent conducting film using a photoresist engraved pattern and surface modification including (S1) forming a photoresist layer 20 on an upper surface of a substrate 10 or an upper surface and lower surface of a substrate 10; (S2) forming an engraved pattern portion in which embossed portions 21 and engraved portions 22 are arranged in a mesh shape in the photoresist layer 20; (S3) depositing a first metal film conductive layer 40 on the engraved pattern portion of the photoresist layer 20, or growing a second metal film conductive layer 50 through a plating process on the first metal film conductive layer 40 in which deposition is completed; (S4) surface-modifying with dry ice powders a surface of the substrate in which deposition or plating is completed; and (S5) removing the embossed portions 21 of the photoresist layer 20, and by forming a thick metal film conductive layer and then performing a wet etching process, by enabling not to perform a wet etching process after forming the thick metal film conductive layer, and by facilitating desorption through surface modification using dry ice, process complexity can be improved and a defect rate can be reduced. Further, it is possible to provide a transparent conducting film having high reliability by greatly reducing visibility through upper and lower low-reflective layers deposited in the engraved portion and enabling to serve as an adhesive layer in the lower portion and as a protective layer in the upper layer.

A method for fabricating an electronic device includes fabricating a plurality of electronic components on a substrate; fabricating a plurality of posts on the plurality of electronic components; depositing filling material between the plurality of posts; and depositing a plurality of top layers, with each top layer disposed on a respective post, thereby fabricating the electronic device. Each top layer is composed of a metal. The step of fabricating the posts includes: fabricating the posts to have identical heights above the substrate. Each post is thermally-conductive, and may be composed of gold. The filling material is composed of MgO, which may be electron beam evaporated to be disposed between the posts. The step of depositing the filling material includes: controlling a thickness of the MgO being deposited by controlling an evaporation rate of the MgO.

A thin film transistor is provided and includes an active layer, a source electrode, a drain electrode, a gate electrode and a gate electrode insulating layer, the active layer includes a source electrode region, a drain electrode region and a channel region, the source electrode region and the drain electrode region include a first metal material, and the channel region includes a semiconductor material made from oxidation of the first metal material.