Patent classifications
H01L21/0332
Semiconductor structure and fabrication method thereof
A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes providing a to-be-etched layer; forming an initial mask layer over the to-be-etched layer; forming a patterned structure, on the initial mask layer and exposing a portion of the initial mask layer; forming a barrier layer on a sidewall surface of the patterned structure; using the patterned structure and the barrier layer as a mask, performing an ion doping process on the initial mask layer to form a doped region and an un-doped region between doped regions in the initial mask layer; removing the patterned structure and the barrier layer; and forming a mask layer on a top surface of the to-be-etched layer by removing the un-doped region. The mask layer includes a first opening exposing the top surface of the to-be-etched layer.
Semiconductor structure and fabrication method thereof
Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a to-be-etched layer; forming a first sacrificial film on the to-be-etched layer; and forming a plurality of discrete first sidewall spacers and sidewall trenches on the first sacrificial film. Each sidewall trench is located between two adjacent first sidewall spacers; the first sidewall trenches include a first sidewall trench and a second sidewall trench, and a width of the second sidewall trench is greater than that of the first sidewall trench. The method also includes forming a second sidewall spacer in the first sidewall trench to fill the first sidewall trench; and etching the first sacrificial film using the first sidewall spacers and the second sidewall spacer as an etching mask to form a plurality of discrete first sacrificial layers on the to-be-etched layer.
Methods for producing high-density carbon films for hardmasks and other patterning applications
Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the embodiments described herein provide methods for producing reduced-stress diamond-like carbon films for patterning applications. In one or more embodiments, a method includes flowing a deposition gas containing a hydrocarbon compound into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck and generating a plasma above the substrate in the processing volume by applying a first RF bias to the electrostatic chuck to deposit a stressed diamond-like carbon film on the substrate. The stressed diamond-like carbon film has a compressive stress of −500 MPa or greater. The method further includes heating the stressed diamond-like carbon film to produce a reduced-stress diamond-like carbon film during a thermal annealing process. The reduced-stress diamond-like carbon film has a compressive stress of less than −500 MPa.
Methods for producing high-density, nitrogen-doped carbon films for hardmasks and other patterning applications
Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the embodiments described herein provide techniques for depositing nitrogen-doped diamond-like carbon films for patterning applications. In one or more embodiments, a method for processing a substrate includes flowing a deposition gas containing a hydrocarbon compound and a nitrogen dopant compound into a processing volume of a process chamber having a substrate positioned on an electrostatic chuck, and generating a plasma at or above the substrate by applying a first RF bias to the electrostatic chuck to deposit a nitrogen-doped diamond-like carbon film on the substrate. The nitrogen-doped diamond-like carbon film has a density of greater than 1.5 g/cc and a compressive stress of about −20 MPa to less than −600 MPa.
RESIST UNDERLAYER FILM-FORMING COMPOSITION
Provided is a novel composition for forming a resist underlayer film. This composition for forming a resist underlayer film includes a polymer (X) and a solvent, the polymer (X) containing: a plurality of structural units which are the same as or different from each other and have a methoxymethyl group and a ROCH2- group (R is a monovalent organic group, a hydrogen atom, or a mixture thereof) other than the methoxymethyl group; and a linking group that links the more than one structural unit.
SEMICONDUCTOR MANUFACTURING METHOD
The present application provides a method for manufacturing a semiconductor, comprising providing a substrate, on which a first, second and third dielectric layers are successively formed, the third dielectric layer having an initial opening; forming a first deposited layer which at least covers a side wall of the initial opening to form a first mask layer having a first opening; removing the second dielectric layer directly below the first opening to expose a side wall of the second dielectric layer; forming a second deposited layer which at least covers the side wall of the first opening and the exposed side wall of the second dielectric layer, to form a second mask layer having a second opening; removing the first dielectric layer directly below the second opening to expose the substrate; and removing the second mask layer, and forming a trench by etching the substrate.
MATERIAL FOR FORMING ORGANIC FILM, SUBSTRATE FOR MANUFACTURING SEMICONDUCTOR DEVICE, METHOD FOR FORMING ORGANIC FILM, AND PATTERNING PROCESS
The present invention is a material for forming an organic film, the material containing (A) a compound for forming an organic film shown by the following general formula (1A), and (B) an organic solvent. This provides a material for forming an organic film which is not only capable of forming an organic film excellent in planarizing property and film formability even on a substrate to be processed having a portion that makes particularly planarization difficult, such as wide trench structure (wide trench), in a fine patterning process by a multilayer resist method in a semiconductor-device manufacturing process, and which is also capable of withstanding high-temperature heating in forming an inorganic hard mask middle layer film by a CVD method.
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SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING SAME
Embodiments provide a semiconductor structure and a fabricating method. The method includes: providing a substrate, where a plurality of active areas arranged at intervals are provided in the substrate, and the substrate is covered with an insulating layer and a barrier layer stacked sequentially; forming, in the barrier layer, a plurality of first trenches arranged at intervals and extending along a first direction and penetrating through the barrier layer; forming a filling layer in the first trenches, and forming a first mask layer on the barrier layer and the filling layer; forming, in the first mask layer, a plurality of second trenches arranged at intervals and extending along a second direction and exposing the filling layer; and removing the filling layer exposed in the second trench and the insulating layer corresponding to the filling layer to form contact holes.
METHODS OF FORMING NANOSTRUCTURES INCLUDING METAL OXIDES USING BLOCK COPOLYMER MATERIALS
A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.
DOSE REDUCTION OF PATTERNED METAL OXIDE PHOTORESISTS
Embodiments of the present disclosure generally relate to a multilayer stack used as a mask in extreme ultraviolet (EUV) lithography and methods for forming a multilayer stack. In one embodiment, the method includes forming a carbon layer over a film stack, forming a metal rich oxide layer on the carbon layer by a physical vapor deposition (PVD) process, forming a metal oxide photoresist layer on the metal rich oxide layer, and patterning the metal oxide photoresist layer. The metal oxide photoresist layer is different from the metal rich oxide layer and is formed by a process different from the PVD process. The metal rich oxide layer formed by the PVD process improves adhesion of the metal oxide photoresist layer and increases the secondary electrons during EUV lithography, which leads to decreased EUV dose energies.