Patent classifications
H01L21/0332
FILM-FORMING COMPOSITION
A film-forming composition includes a solvent and hydrolysis condensate prepared through hydrolysis and condensation of a hydrolyzable silane compound by using an acidic compound containing two or more acidic groups. The hydrolyzable silane compound contains an amino-group-containing silane with formula (1). R.sup.1 is an organic group containing an amino group. R.sup.2 is a substitutable alkyl, substitutable aryl, substitutable aralkyl, substitutable halogenated alkyl, substitutable halogenated aryl, substitutable halogenated aralkyl, substitutable alkoxyalkyl, substitutable alkoxyaryl, substitutable alkoxyaralkyl, or substitutable alkenyl group, or an organic group containing an epoxy, acryloyl, methacryloyl, mercapto, or a cyano group. R.sup.3 is an alkoxy, aralkyloxy, or acyloxy group or halogen atom. a is an integer of 1 or 2, b of 0 or 1; and a and b satisfy a relation of a+b≤2.
R.sup.1.sub.aR.sup.2.sub.bSi(R.sup.3).sub.4−(a+b) (1)
METHOD FOR FORMING SEMICONDUCTOR DEVICE
A method includes forming a dielectric layer over a substrate; forming a patterned amorphous silicon layer over a dielectric layer; depositing a first spacer layer over the patterned amorphous silicon layer; depositing a second spacer layer over the first spacer layer; forming a photoresist having an opening over the substrate; depositing a hard mask layer in the opening of the photoresist; after depositing the hard mask layer in the opening of the photoresist, removing the photoresist; and performing an etching process to etch the dielectric layer by using the patterned amorphous silicon layer, the first spacer layer, the second spacer layer, and the hard mask layer as an etch mask, in which the etching process etches the second spacer layer at a slower etch rate than etching the first spacer layer.
LOSS PREVENTION DURING ATOMIC LAYER DEPOSITION
Methods of depositing silicon oxide on carbon-based films on a substrate involve adsorbing a silicon-containing reactant on the substrate surfaces, generating oxygen radicals from N2O, and exposing the adsorbed silicon-containing reactant to the oxygen radicals to form a silicon oxide film. In some embodiments, the carbon-based films form features having sidewalls. The methods result in low carbon loss and substantially vertical sidewalls. Embodiments of the methods are performed at high temperatures that facilitate high quality deposition.
Hard mask-forming composition and method for manufacturing electronic component
A hard mask-forming composition which forms a hard mask used in lithography, including: a resin containing an aromatic ring and a polar group; and a compound containing at least one of an oxazine ring fused to an aromatic ring, and a fluorene ring.
Patterning process of a semiconductor structure with enhanced adhesion
A lithography method includes forming a bottom anti-reflective coating (BARC) layer on a substrate, wherein the BARC layer includes an organic polymer and a reactive chemical group having at least one of chelating ligands and capping monomers, wherein the reactive chemical group is bonded to the organic polymer; coating a metal-containing photoresist (MePR) layer on the BARC layer, wherein the MePR being sensitive to an extreme ultraviolet (EUV) radiation; performing a first baking process to the MePR layer and the BARC layer, thereby reacting a metal chemical structure of the MePR layer and the reactive chemical structure of the BARC layer and forming an interface layer between the MePR layer and the BARC layer; performing an exposure process using the EUV radiation to the MePR layer; and developing the MePR layer to form a patterned photoresist layer.
Implantation mask formation
Implantation mask formation techniques described herein include increasing an initial aspect ratio of a pattern in an implantation mask by non-lithography techniques, which may include forming a resist hardening layer on the implantation mask. The pattern may be formed by photolithography techniques to the initial aspect ratio that reduces or minimizes the likelihood of pattern collapse during formation of the pattern. Then, the resist hardening layer is formed on the implantation mask to increase the height of the pattern and reduce the width of the pattern, which increases the aspect ratio between the height of the openings or trenches and the width of the openings or trenches of the pattern. In this way, the pattern in the implantation mask may be formed to an ultra-high aspect ratio in a manner that reduces or minimizes the likelihood of pattern collapse during formation of the pattern.
INORGANIC SOLID OBJECT PATTERN MANUFACTURING METHOD AND INORGANIC SOLID OBJECT PATTERN
A method of producing an inorganic solid pattern is described that includes: a step of coating an inorganic solid with a composition containing a polymetalloxane and an organic solvent; a step of heating the coating film obtained in the coating step, at a temperature of 100° C. or more and 1000° C. or less to form a heat-treated film; a step of forming a pattern of the heat-treated film; and a step of patterning the inorganic solid by etching using the pattern of the heat-treated film as a mask.
Trench isolation for advanced integrated circuit structure fabrication
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin comprising silicon, the fin having a lower fin portion and an upper fin portion. A first insulating layer is directly on sidewalls of the lower fin portion of the fin, wherein the first insulating layer is a non-doped insulating layer comprising silicon and oxygen. A second insulating layer is directly on the first insulating layer directly on the sidewalls of the lower fin portion of the fin, the second insulating layer comprising silicon and nitrogen. A dielectric fill material is directly laterally adjacent to the second insulating layer directly on the first insulating layer directly on the sidewalls of the lower fin portion of the fin.
Photoresist and Method
Photoresists and methods of forming and using the same are disclosed. In an embodiment, a method includes spin-on coating a first hard mask layer over a target layer; depositing a photoresist layer over the first hard mask layer using chemical vapor deposition or atomic layer deposition, the photoresist layer being deposited using one or more organometallic precursors; heating the photoresist layer to cause cross-linking between the one or more organometallic precursors; exposing the photoresist layer to patterned energy; heating the photoresist layer to cause de-crosslinking in the photoresist layer forming a de-crosslinked portion of the photoresist layer; and removing the de-crosslinked portion of the photoresist layer.
COMPOUND FOR FORMING HARDMASK, HARDMASK COMPOSITION INCLUDING THE COMPOUND, AND METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE USING THE HARDMASK COMPOSITION
A hardmask-forming compound, a hardmask composition, and a method of manufacturing an integrated circuit (IC), the hardmask-forming compound including a moiety represented by Formula 1:
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