A pattern formation method includes: forming a photosensitive hard mask made of a transition metal oxide film on a surface of a substrate; exposing the photosensitive hard mask to EUV light in a desired pattern; causing a state change in an exposed region by heat generated during exposure; and selectively removing either a region where the state change has occurred or a region where the state change has not occurred.

A semiconductor structure and a method for preparing a semiconductor structure are provided. The method includes: a composite hard mask layer is formed on an etching layer, the composite hard mask layer including a hard mask layer and an etching stop layer surrounded by the hard mask layer; a first target pattern and a first redundant pattern are formed in the composite hard mask layer; a remaining part of the etching stop layer is removed to form a second target pattern and a second redundant pattern in the hard mask layer; etching is performed by using the second target pattern and the second redundant pattern as masks to form a target structure in the etching layer and to form a redundant structure in the hard mask layer; and a remaining part of the hard mask layer is removed.

Embodiments of the present disclosure relate to methods for depositing an amorphous carbon layer onto a substrate, including over previously formed layers on the substrate, using a plasma-enhanced chemical vapor deposition (PECVD) process. In particular, the methods described herein utilize a combination of RF AC power and pulsed DC power to create a plasma which deposits an amorphous carbon layer with a high ratio of sp3 (diamond-like) carbon to sp2 (graphite-like) carbon. The methods also provide for lower processing pressures, lower processing temperatures, and higher processing powers, each of which, alone or in combination, may further increase the relative fraction of sp3 carbon in the deposited amorphous carbon layer. As a result of the higher sp3 carbon fraction, the methods described herein provide amorphous carbon layers having improved density, rigidity, etch selectivity, and film stress as compared to amorphous carbon layers deposited by conventional methods.

A hard mask-forming composition which forms a hard mask used in lithography, including: a resin containing an aromatic ring and a polar group; and a compound containing at least one of an oxazine ring fused to an aromatic ring, and a fluorene ring.

An amorphous carbon hard mask is formed having low hydrogen content and low sp3 carbon bonding but high modulus and hardness. The amorphous carbon hard mask is formed by depositing an amorphous carbon layer at a low temperature in a plasma deposition chamber and treating the amorphous carbon layer to a dual plasma-thermal treatment. The dual plasma-thermal treatment includes exposing the amorphous carbon layer to inert gas plasma for implanting an inert gas species in the amorphous carbon layer and exposing the amorphous carbon layer to a high temperature. The amorphous carbon hard mask has high etch selectivity relative to underlying materials.

An apparatus for treating a substrate includes a heat treatment chamber having an interior space, a housing that is provided in the interior space and that has a treatment space therein, a gas supply line that supplies, into the treatment space, a hydrophobic gas for hydrophobicizing the substrate, and a decomposition unit that decomposes an alkaline gas leaking from the treatment space to the interior space.

First lithography and etching are carried out on a semiconductor structure to provide a first intermediate semiconductor structure having a first set of surface features corresponding to a first portion of desired fin formation mandrels. Second lithography and etching are carried out on the first intermediate structure, using a second mask, to provide a second intermediate semiconductor structure having a second set of surface features corresponding to a second portion of the mandrels. The second set of surface features are unequally spaced from the first set of surface features and/or the features have different pitch. The fin formation mandrels are formed in the second intermediate semiconductor structure using the first and second sets of surface features; spacer material is deposited over the mandrels and is etched back to form a third intermediate semiconductor structure having a fin pattern. Etching is carried out on same to produce the fin pattern.

An initial semiconductor structure includes an underlying substrate, a hard mask stack, an organic planarization layer (OPL), a first complementary material, and a patterned photoresist layer patterned into a plurality of photoresist pillars defining a plurality of photoresist trenches. The first material is partially etched inward of the trenches, to provide trench regions, and the photoresist is removed. The trench regions are filled with a second complementary material, preferentially etchable with respect to the first material. A polymer brush is grafted on the second material but not the first material, to form polymer brush regions with intermediate regions not covered by the brush. The first material is anisotropically etched the at the intermediate regions but not the brush regions. The OPL is etched inward of the intermediate regions, to provide a plurality of OPL pillars defining a plurality of OPL trenches inverted with respect to the photoresist pillars.

Embodiments of the present disclosure generally relate to methods of forming hardmasks. Embodiments described herein enable, e.g., formation of carbon-containing hardmasks having reduced film stress. In an embodiment, a method of processing a substrate is provided. The method includes positioning a substrate in a processing volume of a processing chamber and depositing a diamond-like carbon (DLC) layer on the substrate. After depositing the DLC layer, the film stress is reduced by performing a plasma treatment, wherein the plasma treatment comprises applying a radio frequency (RF) bias power of about 100 W to about 10,000 W.

In an example, a method includes depositing a first sidewall spacer layer over a substrate having a layer stack including alternating layers of a nanosheet and a sacrificial layer, and a dummy gate formed over the layer stack, the first sidewall spacer layer formed over the dummy gate. The method includes depositing a metal-containing liner over the first sidewall spacer layer; forming a first sidewall spacer along the dummy gate by anisotropically etching the metal-containing liner and the first sidewall spacer layer; performing an anisotropic etch back process to form a plurality of vertical recesses in the layer stack; laterally etching the layer stack and form a plurality of lateral recesses between adjacent nanosheets; depositing a second sidewall spacer layer to fill the plurality of lateral recesses; and etching a portion of the second sidewall spacer layer to expose tips of the nanosheet layers.