A pattern formation method includes forming an organic film on a substrate, processing the organic film to form an organic film pattern, exposing the organic film pattern to an organic gas, and exposing the organic film pattern to a metal-containing gas, and after (i) exposing the organic film pattern to the organic gas and (ii) exposing the organic film pattern to the metal-containing gas, treating the organic film pattern with an oxidizing agent.

An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a multi-layer patterned absorber layer on the reflective multilayer stack is provided. Disclosed embodiments include an absorber layer that includes an alloy comprising ruthenium (Ru), chromium (Cr), platinum (Pt), gold (Au), iridium (Ir), titanium (Ti), niobium (Nb), rhodium (Rh), molybdenum (Mo), tungsten (W) or palladium (Pd), and at least one alloying element. The at least one alloying element includes ruthenium (Ru), chromium (Cr), tantalum (Ta), platinum (Pt), gold (Au), iridium (Ir), titanium (Ti), niobium (Nb), rhodium (Rh), molybdenum (Mo), hafnium (Hf), boron (B), nitrogen (N), silicon (Si), zirconium (Zr) or vanadium (V). Other embodiments include a multi-layer patterned absorber structure with layers that include an alloy and an alloying element, where at least two of the layers of the multi-layer structure have different compositions.

A DRAM includes a substrate, a plurality of first active regions disposed on the substrate and arranged end-to-end along the first direction, and a plurality of second active regions disposed between the first active regions and arranged end-to-end along the first direction. The second active regions respectively have a first sidewall adjacent to a first trench between the second active region and one of the first active regions and a second sidewall adjacent to a second trench between the ends of the first active regions, wherein the second sidewall is taper than the first sidewall in a cross-sectional view.

Exemplary deposition methods may include delivering a boron-containing precursor and a nitrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include providing a hydrogen-containing precursor with the boron-containing precursor and the nitrogen-containing precursor. A flow rate ratio of the hydrogen-containing precursor to either of the boron-containing precursor or the nitrogen-containing precursor may be greater than or about 2:1. The methods may include forming a plasma of all precursors within the processing region of the semiconductor processing chamber. The methods may include depositing a boron-and-nitrogen material on a substrate disposed within the processing region of the semiconductor processing chamber.

Exemplary deposition methods may include delivering a ruthenium-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. At least one of the ruthenium-containing precursor or the hydrogen-containing precursor may include carbon. The methods may include forming a plasma of all precursors within the processing region of a semiconductor processing chamber. The methods may include depositing a ruthenium-and-carbon material on a substrate disposed within the processing region of the semiconductor processing chamber.

In an example, a method includes depositing a first sidewall spacer layer over a substrate having a layer stack including alternating layers of a nanosheet and a sacrificial layer, and a dummy gate formed over the layer stack, the first sidewall spacer layer formed over the dummy gate. The method includes depositing a metal-containing liner over the first sidewall spacer layer; forming a first sidewall spacer along the dummy gate by anisotropically etching the metal-containing liner and the first sidewall spacer layer; performing an anisotropic etch back process to form a plurality of vertical recesses in the layer stack; laterally etching the layer stack and form a plurality of lateral recesses between adjacent nanosheets; depositing a second sidewall spacer layer to fill the plurality of lateral recesses; and etching a portion of the second sidewall spacer layer to expose tips of the nanosheet layers.

Exemplary semiconductor processing systems may include a chamber body having sidewalls and a base. The semiconductor processing systems may include a substrate support extending through the base of the chamber body. The substrate support may include a support plate. The substrates support may include a shaft coupled with the support plate. The semiconductor processing systems may include a liner positioned within the chamber body and positioned radially outward of a peripheral edge of the support plate. An inner surface of the liner may include an emissivity texture.

Methods of forming a tungsten film comprising forming a boron seed layer on an oxide surface, an optional tungsten initiation layer on the boron seed layer and a tungsten containing film on the boron seed layer or tungsten initiation layer are described. Film stack comprising a boron seed layer on an oxide surface with an optional tungsten initiation layer and a tungsten containing film are also described.

A substrate processing method is a method of processing a substrate on which a metal-containing liquid for a film below a resist is applied, wherein prior to a heating process of performing a heat treatment on the substrate applied with the metal-containing liquid, the substrate processing method includes: a deprotection promoting process of promoting deprotection of functional groups in a material for the film included in the substrate on which the metal-containing liquid has been applied; a solvent removing process of removing a solvent included in the metal-containing liquid on the substrate; and a moisture absorbing process of bringing a surface of the substrate into contact with moisture.

A technique for suppressing a metal component from remaining at a bottom of a mask pattern when the mask pattern is formed using a metal-containing resist film. A developable anti reflection film 103 is previously formed below a resist film 104. Further, after exposing and developing the wafer W, TMAH is supplied to the wafer W to remove a surface of the anti-reflection film 103 facing a bottom of the recess pattern 110 of the resist film 104. Therefore, the metal component 105 can be suppressed from remaining at the bottom of the recess pattern 110. Therefore, when the SiO.sub.2 film 102 is subsequently etched using the pattern of the resist film 104, the etching is not hindered, so that defects such as bridges can be suppressed.