Patent classifications
H01L21/042
Stacked graphene field-effect transistor
In an aspect of the present invention, a graphene field-effect transistor (GFET) structure is formed. The GFET structure comprises a wider portion and a narrow extension portion extending from the wider portion that includes one or more graphene layers edge contacted to source and drain contacts, wherein the source and drain contacts are self-aligned to the one or more graphene layers.
Homoepitaxial Tunnel Barriers with Functionalized Graphene-on-Graphene and Methods of Making
This disclosure describes a method of making a tunnel barrier-based electronic device, in which the tunnel barrier and transport channel are made of the same materialgraphene. A homoepitaxial tunnel barrier/transport device is created using a monolayer chemically modified graphene sheet as a tunnel barrier on another monolayer graphene sheet. This device displays enhanced spintronic properties over heteroepitaxial devices and is the first to use graphene as both the tunnel barrier and channel.
Homoepitaxial tunnel barriers with functionalized graphene-on-graphene and methods of making
This disclosure describes a method of making a tunnel barrier-based electronic device, in which the tunnel barrier and transport channel are made of the same materialgraphene. A homoepitaxial tunnel barrier/transport device is created using a monolayer chemically modified graphene sheet as a tunnel barrier on another monolayer graphene sheet. This device displays enhanced spintronic properties over heteroepitaxial devices and is the first to use graphene as both the tunnel barrier and channel.
Piezoresistive boron doped diamond nanowire
A UNCD nanowire comprises a first end electrically coupled to a first contact pad which is disposed on a substrate. A second end is electrically coupled to a second contact pad also disposed on the substrate. The UNCD nanowire is doped with a dopant and disposed over the substrate. The UNCD nanowire is movable between a first configuration in which no force is exerted on the UNCD nanowire and a second configuration in which the UNCD nanowire bends about the first end and the second end in response to a force. The UNCD nanowire has a first resistance in the first configuration and a second resistance in the second configuration which is different from the first resistance. The UNCD nanowire is structured to have a gauge factor of at least about 70, for example, in the range of about 70 to about 1,800.
COPPER ETCHANT COMPOSITION
Provided is a copper etchant composition including: a first organic acid containing one or more amine groups, and one or more carboxylic acid groups; a second organic acid; an amine compound; hydrogen peroxide; and a phosphate compound, which has the increased number of processing sheets and etching uniformity, when etching copper.
Scalable high-density wireless neuroelectric sensor and stimulator array
A neuroelectric sensor and stimulator system includes a first antenna, a reader coupled to the first antenna for transmitting stimulation controls and power to a second antenna, and for receiving sensor data transmitted from the second antenna via the first antenna, and at least one neuroelectric sensor stimulator array including the second antenna, a rectifier coupled to the second antenna for extracting power transmitted from the first antenna, a controller coupled to the second antenna for decoding controls transmitted from the first antenna to the second antenna for the neuroelectric sensor stimulator array, a plurality of sensors, a multiplexer coupled to the controller and to the plurality of sensors for selecting a single sensor, and a plurality of stimulators coupled to the controller for stimulating neurons, wherein the rectifier, the controller, the plurality of sensors, the multiplexer, and the plurality of stimulators include graphene.
3D UTB transistor using 2D-material channels
A semiconductor device and a method of manufacture are provided. A substrate has a dielectric layer formed thereon. A three-dimensional feature, such as a trench or a fin, is formed in the dielectric layer. A two-dimensional layer, such as a layer (or multilayer) of graphene, transition metal dichalcogenides (TMDs), or boron nitride (BN), is formed over sidewalls of the feature. The two-dimensional layer may also extend along horizontal surfaces, such as along a bottom of the trench or along horizontal surfaces of the dielectric layer extending away from the three-dimensional feature. A gate dielectric layer is formed over the two-dimensional layer and a gate electrode is formed over the gate dielectric layer. Source/drain contacts are electrically coupled to the two-dimensional layer on opposing sides of the gate electrode.
DIAMOND SEMICONDUCTOR SYSTEM AND METHOD
Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.
Forming patterned graphene layers
An apparatus and method for forming a patterned graphene layer on a substrate. One such method includes forming at least one patterned structure on a substrate; applying a layer of graphene on top of the at least one patterned structure on the substrate; heating the layer of graphene on top of the at least one patterned structure to remove one or more graphene regions proximate to the at least one patterned structure; and removing the at least one patterned structure to produce a patterned graphene layer on the substrate, wherein the patterned graphene layer on the substrate provides carrier mobility for electronic devices.
Method to fabricate micro and nano diamond devices
A method including forming a diamond material on the surface of a substrate; forming a first contact and a separate second contact; and patterning the diamond material to form a nanowire between the first contact and the second contact. An apparatus including a first contact and a separate second contact on a substrate; and a nanowire including a single crystalline or polycrystalline diamond material on the substrate and connected to each of the first contact and the second contact.