A field-effect transistor and a manufacturing method thereof are provided. The method includes depositing a first insulating layer on a substrate; forming a source electrode and a drain electrode on the first insulating layer; forming a carbon quantum dots active layer covering the source electrode and the drain electrode; and forming a second insulating layer and a gate electrode on the carbon quantum dots active layer sequentially. According to the above method, the present disclosure making the field-effect transistor active layer with carbon quantum dots as materials, which enriches the material of the field-effect transistor, reduces the environmental pollution in current technology by using metal dots film, and reduces the dependence on metal elements.

A wide bandgap semiconductor device is comprising an (n) doped drift layer between a first main side and a second main side. On the first main side, n doped source regions are arranged which are laterally surrounded by p doped channel layers having a channel layer depth. P+ doped well layers having a well layer depth, which is at least as large as the channel layer depth is arranged at the bottom of the source regions. A p++ doped plug extends from a depth, which is at least as deep as the source layer depth and less deep than the well layer depth, to a plug depth, which is as least as deep as the well layer depth, and having a higher doping concentration than the well layers, is arranged between the source regions and well layers. On the first main side, an ohmic contact contacts as a first main electrode the source regions, the well layers and the plug.

A method of metal-assisted chemical etching comprises forming an array of discrete metal features on a surface of a semiconductor structure, where each discrete metal feature comprises a porous metal body with a plurality of pores extending therethrough and terminating at the surface of the semiconductor structure. The semiconductor structure is exposed to an etchant, and the discrete metal features sink into the semiconductor structure as metal-covered surface regions are etched. Simultaneously, uncovered surface regions are extruded through the pores to form anchoring structures for the discrete metal features. The anchoring structures inhibit detouring or delamination of the discrete metal features during etching. During continued exposure to the etchant, the anchoring structures are gradually removed, leaving an array of holes in the semiconductor structure.

A field-effect transistor and a manufacturing method thereof are provided. The method includes depositing a first insulating layer on a substrate; forming a source electrode and a drain electrode on the first insulating layer; forming a carbon quantum dots active layer covering the source electrode and the drain electrode; and forming a second insulating layer and a gate electrode on the carbon quantum dots active layer sequentially. According to the above method, the present disclosure making the field-effect transistor active layer with carbon quantum dots as materials, which enriches the material of the field-effect transistor, reduces the environmental pollution in current technology by using metal dots film, and reduces the dependence on metal elements.

A homoepitaxial, ultrathin tunnel barrier-based electronic device in which the tunnel barrier and transport channel are made of the same materialgraphene.

The present invention provides a method of manufacturing an array substrate and a display substrate, and a display panel. The array substrate includes a glass substrate; a gate electrode layer formed on the glass substrate; an insulating layer covering the glass substrate and the gate electrode layer; a semiconductor layer covering the insulating layer; an n-type doping graphene layer formed on the semiconductor layer; and a source and drain electrode layer formed on the n-type graphene layer. Therefore, the present invention can form excellent conduction between the semiconductor layer and a metal electrode layer, and apparently improve performance of semiconductor device.

A semiconductor device according to an embodiment includes an i-type or a p-type first diamond semiconductor layer, an n-type second diamond semiconductor layer provided on the first diamond semiconductor layer, a mesa structure and an n-type first diamond semiconductor region provided on the side surface. The mesa structure includes the first diamond semiconductor layer, the second diamond semiconductor layer, a top surface with a plane orientation of 10 degrees or less from a {100} plane, and a side surface inclined by 20 to 90 degrees with respect to a direction of <011>20 degrees from the {100} plane. The first diamond semiconductor region is in contact with the second diamond semiconductor layer and has an n-type impurity concentration lower than an n-type impurity concentration of the second diamond semiconductor layer.

A graphene electronic device includes a gate insulating layer on a conductive substrate, a channel layer on the gate insulating layer, and a source electrode on one end of the channel layer and a drain electrode on another end of the channel layer. The channel layer includes a semiconductor layer and a graphene layer in direct contact with the semiconductor layer, and the graphene layer includes a plurality of graphene islands spaced apart from each other.

An embodiment of a semiconductor device includes a semiconductor substrate that includes a host substrate and an upper surface, an active area, a substrate opening in the semiconductor substrate that is partially defined by a recessed surface, and a thermally conductive layer disposed over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate within the active area. A method for fabricating the semiconductor device includes defining an active area, forming a gate electrode over a channel in the active area, forming a source electrode and a drain electrode in the active area on opposite sides of the gate electrode, etching a substrate opening in the semiconductor substrate that is partially defined by the recessed surface, and depositing a thermally conductive layer over the semiconductor substrate that extends between the recessed surface and a portion of the semiconductor substrate over the channel.

An optical device includes a gallium and nitrogen containing substrate comprising a surface region configured in a (20-2-1) orientation, a (30-3-1) orientation, or a (30-31) orientation, within +/10 degrees toward c-plane and/or a-plane from the orientation. Optical devices having quantum well regions overly the surface region are also disclosed.