A semiconductor device includes a semiconductor base body having a first main surface and a second main surface, the first main surface and the second main surface being opposite with each other; a Schottky electrode that is disposed on the first main surface and forms a Schottky junction with the semiconductor base body; and a barrier metal layer that is brought into ohmic contact with the first main surface around the Schottky electrode and covers a side surface of the Schottky electrode.

A silicon carbide semiconductor device, including a silicon carbide semiconductor substrate, and an insulating film formed on a front surface of the silicon carbide semiconductor substrate. The silicon carbide semiconductor substrate has fluorine implanted therein, a concentration of which is in a range of 210.sup.17/cm.sup.3 to 410.sup.18/cm.sup.3. A method of manufacturing the silicon carbide semiconductor device includes providing a silicon carbide semiconductor substrate, forming an oxide film on a front surface of the silicon carbide semiconductor substrate, removing a portion of the oxide film to expose the silicon carbide semiconductor substrate, implanting fluorine ions in the front surface of the silicon carbide semiconductor substrate through the removed portion of the oxide film, removing the oxide film after the fluorine ions are implanted, and forming an insulating film on the front surface of the silicon carbide semiconductor substrate after the oxide film is removed.

A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first conductivity type, a gate insulating film provided on a front surface of the silicon carbide semiconductor substrate and including any one or a plurality of an oxide film, a nitride film, and an oxynitride film, and a gate electrode containing poly-silicon and provided on the gate insulating film. A concentration of fluorine in the gate insulating film at an interface with the silicon carbide semiconductor substrate is equal to or higher than 110.sup.19 atoms/cm.sup.3.

A semiconductor device according to an embodiment includes a silicon carbide layer, an insulating layer, and a region provided between the silicon carbide layer and the insulating layer, the region including a plurality of first atoms of one element from the group consisting of nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Si), at least some of the plurality of first atoms being four-fold coordinated atoms and/or five-fold coordinated atoms.

Methods, systems, and devices are disclosed for implementing a semiconductor device having a transistor and a diode that are monolithically integrated. In one aspect, a semiconductor device is provided to include a substrate including semiconductor materials; a drift region formed over the substrate; doping region formed on a surface of the drift region and including a first impurity region and a second impurity region formed over the first impurity region; a body contact formed adjacent to the second impurity region; a Schottky region formed adjacent to the body contact such that the second impurity region and the Schottky contact are located on opposite sides of the body contact, the Schottky region contacting the drift region; and a gate region formed over the doping region.

A semiconductor device of embodiments includes: a silicon carbide layer having a first face and a second face and including a first trench, a second trench having a distance of 100 nm or less from the first trench, a first silicon carbide region of n-type, a second silicon carbide region of p-type between the first trench and the second trench, a third silicon carbide region of n-type between the second silicon carbide region and the first face, a fourth silicon carbide region between the first trench and the second silicon carbide region and containing oxygen, and a fifth silicon carbide region between the second trench and the second silicon carbide region and containing oxygen; a first gate electrode in the first trench; a second gate electrode in the second trench; a first gate insulating layer; a second gate insulating layer; a first electrode; and a second electrode.

An electronic power device includes a substrate of silicon carbide (SiC) having a front surface and a rear surface which lie in a horizontal plane and are opposite to one another along a vertical axis. The substrate includes an active area, provided in which are a number of doped regions, and an edge area, which is not active, distinct from and surrounding the active area. A dielectric region is arranged above the front surface, in at least the edge area. A passivation layer is arranged above the front surface of the substrate, and is in contact with the dielectric region in the edge area. The passivation layer includes at least one anchorage region that extends through the thickness of the dielectric region at the edge area, such as to define a mechanical anchorage for the passivation layer.

A semiconductor device having a voltage resistant structure in a first aspect of the present invention is provided, comprising a semiconductor substrate, a semiconductor layer on the semiconductor substrate, a front surface electrode above the semiconductor layer, a rear surface electrode below the semiconductor substrate, an extension section provided to a side surface of the semiconductor substrate, and a resistance section electrically connected to the front surface electrode and the rear surface electrode. The extension section may have a lower permittivity than the semiconductor substrate. The resistance section may be provided to at least one of the upper surface and the side surface of the extension section.

A trench has first to third side surfaces respectively constituted of first to third semiconductor layers. A first side wall portion included in a first insulating film has first to third regions respectively located on the first to third side surfaces. A second insulating film has a second side wall portion located on the first side wall portion.

The second side wall portion has one end and the other end, the one end being connected to the second bottom portion of the second insulating film, the other end being located on one of the first and second regions, the other end being separated from the third region.

A silicon carbide substrate includes a first impurity region, a well region in contact with the first impurity region, and a second impurity region separated from the first impurity region by the well region. A first main surface includes a first region in contact with a channel region, and a second region different from the first region. A silicon-containing material is formed on the second region. A first silicon dioxide region is formed on the first region. A second silicon dioxide region is formed by oxidizing the silicon-containing material. A gate runner is electrically connected to a gate electrode and formed in a position facing the second silicon dioxide region. Consequently, a silicon carbide semiconductor device capable of achieving improved insulation performance between the gate runner and the substrate while the surface roughness of the substrate is suppressed, and a method of manufacturing the same can be provided.