H01L21/185

Substrate positioning apparatus, substrate positioning method, and bonding apparatus
11545383 · 2023-01-03 · ·

A substrate positioning apparatus includes a holder and a rotating device. The holder is configured to hold a substrate. The rotating device is configured to rotate the holder. The rotating device includes a rotation shaft, a bearing member, a base member, a driving unit and a damping device. The rotation shaft is fixed to the holder. The bearing member is configured to support the rotation shaft in a non-contact state. The bearing member is fixed on the base member. The driving unit is configured to rotate the rotation shaft. The damping device includes a rail connected to the base member and a slider connected to the rotation shaft, and is configured to produce a damping force against a relative operation between the rotation shaft and the base member by a resistance generated between the rail and the slider.

APPARATUS AND METHOD FOR HEATING A SUBSTRATE
20220415675 · 2022-12-29 · ·

Apparatus and method for heating a substrate. The apparatus including a heater and a substrate holder with a substrate holder surface, wherein the substrate to be heated can be placed on the substrate holder surface, the apparatus further includes means for exerting forces on the heater, the apparatus further includes a control unit for controlling the means, wherein the heater is deformable by the means.

SUBSTRATE FOR AN ELECTRONIC DEVICE AND METHOD FOR PRODUCING THE SAME

The present invention is a substrate for an electronic device, including a nitride semiconductor film formed on a joined substrate including a silicon single crystal, where the joined substrate has at least a bond wafer including a silicon single crystal joined on a base wafer including a silicon single crystal, the base wafer includes CZ silicon having a resistivity of 0.1 Ωcm or lower and a crystal orientation of <100>, and the bond wafer has a crystal orientation of <111>. This provides a substrate for an electronic device, having a suppressed warp.

METHOD FOR FABRICATING SEMICONDUCTOR CHIP STRUCTURES, SEMICONDUCTOR CARRIER AND SEMICONDUCTOR CHIP STRUCTURE
20220359213 · 2022-11-10 ·

A method for fabricating semiconductor chip structures, which comprises steps of: providing plural slice units tiled with one another on a process carrier, wherein each slice unit is made from a wafer and includes a substrate with an outline, and a gap is formed between adjacent two of the slice units; planarizing tops of the slice units; accomplishing circuits on the slice units and turning them into circuited slice units; and forming plural semiconductor chip structures individually with each other by at least breaking down the circuited slice units; wherein a planar size of one slice unit is no less than that of a corresponding semiconductor chip structure, or the planar size of one slice unit is no less than multiple of the planar size of the corresponding semiconductor chip structure. A semiconductor carrier and a semiconductor chip structure made by the method are also provided.

BONDING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
20230091517 · 2023-03-23 · ·

A bonding apparatus according to an embodiment includes a first chuck, a second chuck, and a pushpin arranged in a center portion of the second chuck. The first chuck includes a first area and a second area in a plane view. The first chuck includes a first rib arranged to divide the first area and the second area from each other in the plane view. The first area includes an area that overlaps the pushpin in the plane view. The second area encircles an outer perimeter of the first area in the plane view. The first chuck has a plurality of pins arranged at intervals in the second area, and has no pin in the area of the first area that overlaps the pushpin in the plane view.

Bonded unified semiconductor chips and fabrication and operation methods thereof

Embodiments of bonded unified semiconductor chips and fabrication and operation methods thereof are disclosed. In an example, a method for forming a unified semiconductor chip is disclosed. A first semiconductor structure is formed. The first semiconductor structure includes one or more processors, an array of embedded DRAM cells, and a first bonding layer including a plurality of first bonding contacts. A second semiconductor structure is formed. The second semiconductor structure includes an array of NAND memory cells and a second bonding layer including a plurality of second bonding contacts. The first semiconductor structure and the second semiconductor structure are bonded in a face-to-face manner, such that the first bonding contacts are in contact with the second bonding contacts at a bonding interface.

SEMICONDUCTOR DEVICE
20230069546 · 2023-03-02 · ·

A semiconductor device according to one or more embodiments is disclosed that may include a first substrate comprising a single-crystalline SiC substrate; a second substrate comprising a polycrystalline SiC substrate; and an interface layer sandwiched between the first substrate and the second substrate and comprising at least elements of phosphorus and chromium.

SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
20230165009 · 2023-05-25 · ·

According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.

BONDING APPARATUS AND BONDING METHOD
20230162982 · 2023-05-25 ·

A bonding apparatus includes a first holder, a second holder, a moving unit, a first transforming unit, a second transforming unit and a controller. The first holder holds a first substrate from above. The second holder is provided below the first holder, and holds a second substrate from below. The moving unit moves the first holder and the second holder relative to each other. The first transforming unit makes a central portion of the first substrate held by the first holder protruded downwards. The second transforming unit makes a central portion of the second substrate held by the second holder protruded upwards. The controller performs a control of bringing the central portions into contact with each other. The controller performs a control of changing a protruding amount of the central portion of the first substrate according to a protruding amount of the central portion of the second substrate.

Semiconductor Device and Method of Providing Rad Hard Power Transistor with 1200v Breakdown Voltage

A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third semiconductor layer made of the second semiconductor material can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device or electrical component is formed in the second semiconductor layer. The electrical component can be a power MOSFET. A first insulating layer, such as an oxide layer, is formed over the electrical component, and second insulating layer, such as a nitride layer, is formed over the first insulating layer for protection against radiation.