H01L21/20

STRUCTURE PROVIDING POLY-RESISTOR UNDER SHALLOW TRENCH ISOLATION AND ABOVE HIGH RESISTIVITY POLYSILICON LAYER

Embodiments of the disclosure provide a method, including forming a shallow trench isolation (STI) in a substrate. The method further includes doping the substrate with a noble dopant, thereby forming a disordered crystallographic layer under the STI. The method also includes converting the disordered crystallographic layer to a doped buried polysilicon layer under the STI and a high resistivity (HR) polysilicon layer under the doped buried polysilicon layer. The method includes forming a pair of contacts operatively coupled in a spaced manner to the doped buried polysilicon layer.

SEMICONDUCTOR EPITAXIAL WAFER AND METHOD OF PRODUCING SEMICONDUCTOR EPITAXIAL WAFER, AND METHOD OF PRODUCING SOLID-STATE IMAGING DEVICE
20230215730 · 2023-07-06 · ·

An epitaxial wafer that includes a silicon wafer and an epitaxial layer on the silicon wafer. The silicon wafer contains hydrogen that has a concentration profile including a first peak and a second peak. A hydrogen peak concentration of the first peak and a hydrogen peak concentration of the second peak are each not less than 1×10.sup.17 atoms/cm.sup.3.

Compound semiconductor, method for manufacturing same, and nitride semiconductor

A compound semiconductor has a high electron concentration of 5×10.sup.19 cm.sup.−3 or higher, exhibits an electron mobility of 46 cm.sup.2/V.Math.s or higher, and exhibits a low electric resistance, and thus is usable to produce a high performance semiconductor device. The present invention provides a group 13 nitride semiconductor of n-type conductivity that may be formed as a film on a substrate having a large area size at a temperature of room temperature to 700° C.

Compound semiconductor, method for manufacturing same, and nitride semiconductor

A compound semiconductor has a high electron concentration of 5×10.sup.19 cm.sup.−3 or higher, exhibits an electron mobility of 46 cm.sup.2/V.Math.s or higher, and exhibits a low electric resistance, and thus is usable to produce a high performance semiconductor device. The present invention provides a group 13 nitride semiconductor of n-type conductivity that may be formed as a film on a substrate having a large area size at a temperature of room temperature to 700° C.

Method of manufacturing semiconductor device, substrate processing apparatus, and non-transitory computer-readable recording medium
11553565 · 2023-01-10 · ·

A substrate processing technology including: transferring a substrate to a process chamber and mounting the substrate on a substrate holder; heating the substrate with a heating device to perform predetermined substrate processing; determining the number of times of the predetermined substrate processing that has been performed that the predetermined substrate processing has been performed a preset number of times or more, determining whether it is necessary to adjust a mounting position at which the substrate is mounted on the substrate holder; and when it is determined that a mounting position adjustment is necessary, determining the mounting position by comparing the substrate temperature measured at the performing the predetermined substrate processing with a premeasured temperature of the substrate which corresponds to the mounting position and is stored in a memory.

Capacitor and capacitor module

According to one embodiment, a capacitor includes a conductive substrate, a conductive layer, a dielectric layer, and first and second external electrodes. The conductive substrate has a first main surface provided with recess(s), a second main surface, and an end face extending between edges of the first and second main surfaces. The conductive layer covers the first main surface and side walls and bottom surfaces of the recess(s). The dielectric layer is interposed between the conductive substrate and the conductive layer. The first external electrode includes a first electrode portion facing the end face and is electrically connected to the conductive layer. The second external electrode includes a second electrode portion facing the end face and is electrically connected to the conductive substrate.

METHOD AND CARRIER ELEMENT FOR PRODUCING A WAFER LAYER
20220406590 · 2022-12-22 · ·

A method for producing a wafer layer, including the method steps of: A) providing a carrier element; B) making the carrier element porous on at least one surface in order to produce a separating layer; C) applying a wafer layer to the separating layer of the carrier element by epitaxy; and D) detaching the wafer layer from the carrier element, with method steps B to D being repeated at least once, preferably multiple times, with the carrier element. The method step A includes the additional method steps of: A1) providing a carrier substrate; and A2) applying a seed layer to at least one surface and at least one lateral face of the carrier substrate by epitaxy in order to produce the carrier element. A carrier element for producing a wafer layer and an intermediate product are also provided.

METHOD AND CARRIER ELEMENT FOR PRODUCING A WAFER LAYER
20220406590 · 2022-12-22 · ·

A method for producing a wafer layer, including the method steps of: A) providing a carrier element; B) making the carrier element porous on at least one surface in order to produce a separating layer; C) applying a wafer layer to the separating layer of the carrier element by epitaxy; and D) detaching the wafer layer from the carrier element, with method steps B to D being repeated at least once, preferably multiple times, with the carrier element. The method step A includes the additional method steps of: A1) providing a carrier substrate; and A2) applying a seed layer to at least one surface and at least one lateral face of the carrier substrate by epitaxy in order to produce the carrier element. A carrier element for producing a wafer layer and an intermediate product are also provided.

METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR ELEMENT BODY
20220406641 · 2022-12-22 · ·

A method for manufacturing a semiconductor element according to the present disclosure includes an element layer forming step of forming a semiconductor element layer on a first surface of a ground substrate; a first supporting substrate preparing step of positioning a first supporting substrate that has a third surface and has a bonding material located on the third surface so that the third surface faces the first surface; a pressing step of causing the bonding material to enter a gap between the ground substrate and the semiconductor element layer; and a peeling step of peeling off the first supporting substrate, the bonding material, and the semiconductor element layer from the ground substrate.

CONTROL DEVICE AND CONTROL METHOD FOR SINGLE-WAFER PROCESSING EPITAXIAL GROWTH APPARATUS, AND EPITAXIAL WAFER PRODUCTION SYSTEM
20220406599 · 2022-12-22 · ·

A control device includes a calculation unit generating control information for an epitaxial growth apparatus; and a storage unit storing measurement values for an epitaxial film formed by the epitaxial growth apparatus and measurement values for epitaxial films formed by a plurality of other epitaxial growth apparatuses that are provided in the same production line as the epitaxial growth apparatus that needs new control. The calculation unit generates and outputs information for controlling at least one of the supply time of a source gas and the flow rate of a dopant gas in the epitaxial growth apparatus based on the measurement values for the epitaxial film formed by the epitaxial growth apparatus that needs new control and the measurement values of the epitaxial films formed by the other epitaxial growth apparatuses in the same production line that are in operation concurrently with the epitaxial growth apparatus.