A method includes forming a fin on a substrate. A first liner is formed on the fin. A first dielectric layer is formed above the first liner. A patterned hard mask is formed above the first dielectric layer and has a fin cut opening defined therein. Portions of the first dielectric layer and the first liner disposed below the fin cut opening are removed to expose a portion of the fin. The patterned hard mask layer is removed. The exposed portion of the fin is oxidized to define a diffusion break in the fin.

Provided is a semiconductor device formed by performing bonding at room temperature with respect to a wafer in which bonded electrodes and insulating layers and are respectively exposed to front surfaces, including a bonding interlayer which independently exhibits non-conductivity and exhibits conductivity by being bonded to the bonded electrodes, between the front surfaces.

A nonvolatile memory device group includes: (A) a first insulating layer; (B) a second insulating layer that has a first concavity and a second concavity communicating with the first concavity and having a width larger than that of the first concavity and that is disposed on the first insulating layer; (C) a plurality of electrodes that are disposed in the first insulating layer and the top surface of which is exposed from the bottom surface of the first concavity; (D) an information storage layer that is formed on the side walls and the bottom surfaces of the first concavity and the second concavity; and (E) a conductive material layer that is filled in a space surrounded with the information storage layer in the second concavity.

The present disclosure provides a method of preparing a chalcogen containing solution that is hydrazine free and hydrazinium free, wherein the method comprises: providing a predetermined amount of elemental chalcogen; providing a predetermined amount of elemental sulfur; providing an amine solvent; and combining the predetermined amount of elemental chalcogen and the predetermined amount of elemental sulfur in the amine solvent, thereby dissolving the elemental chalcogen and the elemental sulfur in the amine solvent. The chalcogen containing solution can advantageously be used as a precursor for the formation of a chalcogen containing layer on a substrate.

When opaque films are deposited on semi-conductor wafers, underlying features may be concealed. In accordance with one implementation, such concealed features may be re-exposed via an ablation recovery process. One ablation recovery process entails aligning an energy source with a target position on a first surface of a semiconductor wafer based on position information retrieved from a second opposite surface of the semiconductor wafer, and firing a beam of the energy source to ablate opaque material at the target position and to expose a recovery feature underlying the opaque material.

According to one embodiment, a semiconductor memory device includes a semiconductor substrate, a stacked body, a semiconductor member, a semiconductor portion, a first insulating film, and a charge storage film. The semiconductor member includes a first portion and a second portion, the first portion contacting with the semiconductor substrate, the second portion being provided on the first portion, contacting with the first portion, and having a second width smaller than a first width of the first portion in a first direction crossing a stacking direction. The first insulating film is provided on a side surface of the second portion. The charge storage film is provided on a side surface of the semiconductor portion, extends in the stacking direction, and includes a first portion located on an upper surface of the second portion of the semiconductor member.

Provided is a device in which the metal content existing in a joining interface is controlled. A manufacturing method for the device comprises: a step in which the surfaces of a first substrate and a second substrate are activated using a FAB gun; a step in which a plurality of metals are discharged by using the FAB gun to sputter a discharged metal body comprising the plurality of metals, and the plurality of metals are affixed to the surfaces of the first substrate and the second substrate; a step in which the first substrate and the second substrate are joined at room temperature; and a step in which heating is performed at a temperature that is high in comparison to the agglomeration start temperature of the plurality of metals and of the elements that constitute the first substrate or the second substrate. With regards to the step in which the plurality of metals are affixed, the density of the plurality of metals existing on the joining interface of the first substrate and the second substrate is set to 1×10.sup.12/cm.sup.2 or less by adjusting the exposure area of the discharged metal body.

A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.

In some embodiments, silicon-filled openings are formed having no or a low occurrence of voids in the silicon fill, while maintaining a smooth exposed silicon surface. In some embodiments, an opening in a substrate may be filled with silicon, such as amorphous silicon. The deposited silicon may have interior voids. This deposited silicon is then exposed to a silicon mobility inhibitor, such as an oxygen-containing species and/or a semiconductor dopant. The deposited silicon fill is subsequently annealed. After the anneal, the voids may be reduced in size and, in some embodiments, this reduction in size may occur to such an extent that the voids are eliminated.

A method and a device for prefixing substrates, whereby at least one substrate surface of the substrates is amorphized in at least one surface area, characterized in that the substrates are aligned and then make contact and are prefixed on the amorphized surface areas.