H01L21/26

FABRICATION METHOD OF FORMING SILICON CARBIDE MOSFET
20230261086 · 2023-08-17 ·

A fabrication method of forming a silicon carbide MOSFET is provided. The fabrication method includes the step of providing a semiconductor substrate. A P-well region is formed by implanting the semiconductor substrate through the P-well mask. A spacer is disposed on sidewall of the P-well mask and the P-well region is implanted to form a P-plus layer and an N-plus layer. A gate oxide layer, a poly gate and a first interlayer dielectric layer are formed on the semiconductor substrate. The first interlayer dielectric layer is etched to form an opening and the opening exposes the P-plus layer. A metal layer is disposed to cover the opening and the first interlayer dielectric layer.

PLASMA PROCESSING DEVICE AND METHOD FOR PROCESSING SAMPLE USING SAME
20210366791 · 2021-11-25 ·

There is provided a sample processing method including: an adsorption step forming a reactant layer on a sample surface inside a processing chamber in a state where plasma is generated by a plasma generation unit in a plasma generation chamber connected to the processing chamber; a desorption step of desorbing the reactant layer from the surface of the sample by heating the sample with a heating lamp disposed outside the processing chamber and a heater disposed inside the sample stage; a cooling step of cooling the sample heated in the desorption step; and repeating the above steps a plurality of times, wherein in the adsorption step, a control unit performs feed-forward control over the heating lamp and the heater to set the sample to a first temperature state, and in the desorption step, the heater is subjected to feed-back control to set the sample to a second temperature state.

Memory device and manufacturing method thereof

A memory device includes a semiconductor fin, a floating gate, a control gate, a source region, an erase gate, and a select gate. The floating gate is above and conformal to the semiconductor fin. The control gate is above the floating gate. The source region is in the semiconductor fin. The erase gate is above the source region and adjacent the control gate. The select gate is above the semiconductor fin. The control gate is between the erase gate and the select gate.

Method and apparatuses for reducing porogen accumulation from a UV-cure chamber

Porogen accumulation in a UV-cure chamber is reduced by removing outgassed porogen through a heated outlet while purge gas is flowed across a window through which a wafer is exposed to UV light. A purge ring having specific major and minor exhaust to inlet area ratios may be partially made of flame polished quartz to improve flow dynamics. The reduction in porogen accumulation allows more wafers to be processed between chamber cleans, thus improving throughput and cost.

Method and apparatuses for reducing porogen accumulation from a UV-cure chamber

Porogen accumulation in a UV-cure chamber is reduced by removing outgassed porogen through a heated outlet while purge gas is flowed across a window through which a wafer is exposed to UV light. A purge ring having specific major and minor exhaust to inlet area ratios may be partially made of flame polished quartz to improve flow dynamics. The reduction in porogen accumulation allows more wafers to be processed between chamber cleans, thus improving throughput and cost.

Method for evaluating carbon concentration
11175231 · 2021-11-16 · ·

A method for evaluating a carbon concentration where ions of a predetermined element are implanted into a silicon wafer, and then a carbon concentration is measured by a low-temperature PL method from an emission intensity of a CiCs composite, where the ions are implanted under implantation conditions of 1.1×10.sup.11×[atomic weight of the implanted element].sup.−0.73<implantation amount (cm.sup.−2)<4.3×10.sup.11×[atomic weight of the implanted element].sup.−0.73, and the carbon concentration is evaluated. A method for evaluating a carbon concentration makes it possible to measure with high sensitivity, a carbon concentration in a surface layer of 1 to 2 μm, which is a photodiode region in an image sensor.

OPTICAL HEATING DEVICE

An optical heating device for heating a substrate includes: a chamber for accommodating the substrate; a support member for supporting the substrate in the chamber; a flash lamp disposed to face a first main surface of the substrate supported by the support member; a plurality of LED elements for emitting light from outside a flash light irradiation space that is sandwiched between the substrate supported by the support member and the flash lamp, the light traveling toward the first main surface of the substrate or a second main surface of the substrate that is the opposite side of the first main surface; and a light blocking member disposed between the flash lamp and a plurality of the LED elements in a separating direction, and outside the flash light irradiation space, for blocking the light emitted from the flash lamp and traveling toward a plurality of the LED elements.

OPTICAL HEATING DEVICE

An optical heating device for heating a substrate includes: a chamber for accommodating the substrate; a support member for supporting the substrate in the chamber; a flash lamp disposed to face a first main surface of the substrate supported by the support member; a plurality of LED elements for emitting light from outside a flash light irradiation space that is sandwiched between the substrate supported by the support member and the flash lamp, the light traveling toward the first main surface of the substrate or a second main surface of the substrate that is the opposite side of the first main surface; and a light blocking member disposed between the flash lamp and a plurality of the LED elements in a separating direction, and outside the flash light irradiation space, for blocking the light emitted from the flash lamp and traveling toward a plurality of the LED elements.

Artificial intelligence-enabled preparation end-pointing

Methods and systems for implementing artificial intelligence enabled preparation end-pointing are disclosed. An example method at least includes obtaining an image of a surface of a sample, the sample including a plurality of features, analyzing the image to determine whether an end point has been reached, the end point based on a feature of interest out of the plurality of features observable in the image, and based on the end point not being reached, removing a layer of material from the surface of the sample.

Thermal processing method for silicon wafer

A processing temperature T.sub.S by a rapid thermal processing furnace is 1250° C. or more and 1350° C. or less, and a cooling rate R.sub.d from the processing temperature is in a range of 20° C./s or more and 150° C./s or less, and thermal processing is performed by adjusting the processing temperature T.sub.S and the cooling rate R.sub.d within a range between the upper limit P=0.00207T.sub.S.Math.R.sub.d−2.52R.sub.d+13.3 (Formula (A)) and the lower limit P=0.000548T.sub.S.Math.R.sub.d−0.605R.sub.d−0.511 (Formula (B)) of an oxygen partial pressure P in a thermal processing atmosphere.