H01L21/30

Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy
10847639 · 2020-11-24 · ·

Described herein is a FinFET device in which epitaxial layers of semiconductor material are formed in source/drain regions on fin portions. The fin portions can be located within a dielectric layer that is deposited on a semiconductor substrate. Surfaces of the fin portions can be oriented in the {100} lattice plane of the crystalline material of the fin portions, providing for good epitaxial growth. Further described are methods for forming the FinFET device.

Semiconductor device and manufacturing method of semiconductor device
10840361 · 2020-11-17 · ·

There is provided a semiconductor device comprising: a semiconductor substrate; an emitter region of a first conductivity type provided inside the semiconductor substrate; a base region of a second conductivity type provided below the emitter region inside the semiconductor substrate; an accumulation region of the first conductivity type provided below the base region inside the semiconductor substrate, and containing hydrogen as an impurity; and a trench portion provided to pass through the emitter region, the base region and the accumulation region from an upper surface of the semiconductor substrate.

Direct-bonded native interconnects and active base die

Direct-bonded native interconnects and active base dies are provided. In a microelectronic architecture, active dies or chiplets connect to an active base die via their core-level conductors. These native interconnects provide short data paths, which forgo the overhead of standard interfaces. The system saves redistribution routing as the native interconnects couple in place. The base die may contain custom logic, allowing the attached dies to provide stock functions. The architecture can connect diverse interconnect types and chiplets from various process nodes, operating at different voltages. The base die may have state elements for drive. Functional blocks aboard the base die receive native signals from diverse chiplets, and communicate with all attached chiplets. The chiplets may share processing and memory resources of the base die. Routing blockages are minimal, improving signal quality and timing. The system can operate at dual or quad data rates. The architecture facilitates ASIC, ASSP, and FPGA ICs and neural networks, reducing footprint and power requirements.

Semiconductor device

A semiconductor device includes a semiconductor substrate, an insulating film provided on the semiconductor substrate, a first element disposed at least in a lower layer portion of the insulating film, a second element disposed at least in the lower layer portion of the insulating film, and a hydrogen barrier member provided on the semiconductor substrate. The hydrogen barrier member is made from a material transmitting hydrogen less easily than does a material of the insulating film. The hydrogen barrier member and the semiconductor substrate surround the second element. The hydrogen barrier member does not surround the first element.

Hydrosilylation in semiconductor processing

An example of forming semiconductor devices can include forming a silicon-hydrogen (SiH) terminated surface on a silicon structure that includes patterned features by exposing the silicon structure to a hydrogen fluoride (HF) containing solution and performing a surface modification via hydrosilylation by exposing the SiH terminated surface to an alkene and/or an alkyne.

Apparatus of controlling temperature in wafer cleaning equipment and method thereof
10818526 · 2020-10-27 · ·

The present invention relates to an apparatus of controlling a temperature of a wafer cleaning equipment capable of quickly and accurately determining a detection abnormality of a temperature sensor located inside a cleaning tank, and a method of controlling a temperature using the same. The apparatus of controlling a temperature of a wafer cleaning equipment and the method of controlling a temperature using the same according to the present invention may determine an abnormal operation of a first temperature sensor installed at an inner side of an inner tank by comparing a measurement value of the first temperature sensor installed at the inner side of the inner tank and a measurement value of a second temperature sensor installed at a transfer robot configured to transfer wafers to the inner side of the inner tank. Meanwhile, a method of controlling a temperature of a wafer cleaning equipment according to the present invention may determine an abnormal operation of temperature sensors by comparing measurement values of the temperature sensors installed at an inner side of each of inner tanks in a state of supplying deionized water of a set temperature to each of the inner tanks after discharging a cleaning solution accommodated in each of the inner tanks of a plurality of cleaning tanks.

Semiconductor device having germanium containing active pattern and method for fabricating the same

A semiconductor device includes a gate electrode extending in a first direction on a substrate, a first active pattern extending in a second direction intersecting the first direction on the substrate to penetrate the gate electrode, the first active pattern including germanium, an epitaxial pattern on a side wall of the gate electrode, a first semiconductor oxide layer between the first active pattern and the gate electrode, and including a first semiconductor material, and a second semiconductor oxide layer between the gate electrode and the epitaxial pattern, and including a second semiconductor material. A concentration of germanium of the first semiconductor material may be less than a concentration of germanium of the first active pattern, and the concentration of germanium of the first semiconductor material may be different from a concentration of germanium of the second semiconductor material.

Substrate processing apparatus, method of manufacturing semiconductor device and non-transistory computer-readable recording medium

Described herein is a technique capable of heating a substrate uniformly by electromagnetic waves. According to one aspect of the technique, there is provided a substrate processing apparatus including: a process chamber where a substrate is processed; a heating device configured to heat the substrate by electromagnetic waves; a gas supply mechanism including a hydrogen-containing gas supply system configured to supply a hydrogen-containing gas into the process chamber; a plasma generator configured to excite the hydrogen-containing gas by plasma; and a controller configured to control the heating device, the gas supply mechanism and the plasma generator to modify the substrate by performing: (a) adding hydrogen atom to a surface of the substrate by supplying the hydrogen-containing gas excited by the plasma generator onto the substrate; and (b) intermittently supplying the electromagnetic waves to heat the substrate after performing (a).

Surface treatment of silicon and carbon containing films by remote plasma with organic precursors

Surface treatment processes for treating low-k dielectric materials are provided. One example implementation can include a method for processing a workpiece. The workpiece can include a silicon and carbon containing film material. The method can include treating the workpiece with a surface treatment process. The surface treatment process can include generating one or more species in a first chamber; mixing one or more hydrocarbon molecules with the species to create a mixture comprising one or more organic radicals; and exposing the silicon and carbon containing layer on the workpiece to the mixture in a second chamber.

Semiconductor device and method for forming p-type conductive channel in diamond using abrupt heterojunction

The present application discloses a semiconductor device and a method for forming a p-type conductive channel in a diamond using an abrupt heterojunction, which pertain to the technical field of fabrication of semiconductor devices. The method includes: forming a diamond layer on a substrate; forming one or multiple layers of a heterogeneous elementary substance or compound having an acceptor characteristic on an upper surface of the diamond layer; forming a heterojunction at an interface between the diamond layer and an acceptor layer; forming two-dimensional hole gas at one side of the diamond layer with a distance of 10 nm-20 nm away from the heterojunction; and using the two-dimensional hole gas as a p-type conductive channel. The method enables a concentration and a mobility of carriers to maintain stable at a temperature range of 0 C.-1000 C., thereby realizing normal operation of the diamond device at high temperature environment.