H01L21/4803

MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
20170365534 · 2017-12-21 ·

A manufacturing method of a semiconductor package includes etching a first surface and a side surface of a base substrate, the base substrate including the first, a second and the side surfaces positioned between the first and the second surfaces, the base substrate containing a metal, attaching a metal different from the metal contained in the base substrate to the first and the side surfaces, disposing a semiconductor device on the second surface, the semiconductor device having an external terminal, forming a resin insulating layer sealing the semiconductor device, forming a first conductive layer on the resin insulating layer, forming an opening, exposing the external terminal, in the first conductive layer and the resin insulating layer; and forming a metal layer on the first and the side surfaces, on the first conductive layer and in the opening.

Semiconductor device with plated lead frame, and method for manufacturing thereof

A carrier substrate having a plurality of receptacles each for receiving and carrying a semiconductor chip is provided. Semiconductor chips are arranged in the receptacles, and metal is plated in the receptacles to form a metal structure on and in contact with the semiconductor chips. The carrier substrate is cut to form separate semiconductor devices.

MOLDED INTERCONNECT DEVICE, MANUFACTURING METHOD FOR MOLDED INTERCONNECT DEVICE, AND CIRCUIT MODULE
20170358526 · 2017-12-14 · ·

A molded interconnect device adapted to form a three-dimensional circuit by using laser beams includes: a main body on which the three-dimensional circuit is formed; and a lead portion connected to an external electrode of an external substrate by solder and extending from the main body. The lead portion includes: a lead main body molded from a material same as a material of the main body; and a metal film formed on at least a part of an outer periphery of the lead main body.

Semiconductor Package, Semiconductor Die and Method for Forming a Semiconductor Package or a Semiconductor Die

A semiconductor package comprises a semiconductor die and a wiring structure, which is electrically connected to the semiconductor die. Further, the semiconductor package comprises a magnetic material. The magnetic material embeds and/or encircles a portion of the wiring structure.

Housing, Semiconductor Module Comprising a Housing and Method for Producing a Housing
20230187291 · 2023-06-15 ·

A housing for a power semiconductor module includes sidewalls and a top that includes a first surface extending in a first horizontal plane and a second surface opposite and in parallel to the first surface, a plurality of openings of a first kind, each of the plurality of openings of the first kind including a first through hole extending through the top from the first surface to the second surface, and a plurality of openings of a second kind, each of the plurality of openings of the second kind comprising a second through hole extending through the top from the first surface to the second surface. Each of the plurality of openings of the first kind includes a collar or sleeve. Each of the plurality of openings of the second kind includes a trench or indentation arranged adjacent to and forming a closed loop around the respective second through hole.

Method for manufacturing laminate, method for manufacturing sealed substrate laminate, sealed substrate laminate, and sealed substrate

A laminate manufactured by forming a step difference in a substrate by grinding a periphery edge portion to have such a size that a surface on the inner side of the step difference can be housed in a cavity of a die, and then laminating the substrate, an adhesive layer, a release layer, and a support plate in this order such that the surface on the inner side of the step difference of the substrate faces the support plate.

WAFER LEVEL PACKAGING USING A TRANSFERABLE STRUCTURE
20170345676 · 2017-11-30 ·

According to various aspects and embodiments, a system and method for packaging an electronic device is disclosed. One example of the method comprises depositing a layer of temporary bonding material onto a surface of a first substrate, depositing a layer of structure material onto a surface of the layer of temporary bonding material, masking at least a portion of the structure material to define an unmasked portion and a masked portion of the structure material, exposing the unmasked portion of the structure material to a source of light, removing the masked portion of the structure material, bonding at least a portion of a surface of a second substrate to the unmasked portion of the structure material, and removing the first substrate from the unmasked portion of the structure material.

TAMPER-PROOF ELECTRONIC PACKAGES WITH STRESSED GLASS COMPONENT SUBSTRATE(S)

Tamper-proof electronic packages and fabrication methods are provided which include a glass substrate. The glass substrate is stressed glass with a compressively-stressed surface layer. Further, one or more electronic components are secured to the glass substrate within a secure volume of the tamper-proof electronic package. In operation, the glass substrate is configured to fragment with an attempted intrusion event into the electronic package, and the fragmenting of the glass substrate also fragments the electronic component(s) secured to the glass substrate, thereby destroying the electronic component(s). In certain implementations, the glass substrate has undergone ion-exchange processing to provide the stressed glass. Further, the electronic package may include an enclosure, and the glass substrate may be located within the secure volume separate from the enclosure, or alternatively, the enclosure may be a stressed glass enclosure, an inner surface of which is the glass substrate for the electronic component(s).

Heat dissipation sheet, manufacturing method of heat dissipation sheet, and electronic apparatus
11264302 · 2022-03-01 · ·

A heat dissipation sheet includes a first sheet composed of a plurality of first carbon nanotubes, and a second sheet composed of a plurality of second carbon nanotubes, wherein the first sheet and the second sheet are coupled in a stacked state, and the first carbon nanotubes and the second carbon nanotubes are different in an amount of deformation when pressure is applied.

COPPER FLANGED AIR CAVITY PACKAGES FOR HIGH FREQUENCY DEVICES
20170338161 · 2017-11-23 ·

An air cavity package includes a flange and a pedestal extending upward from the flange. A dielectric frame is joined to the flange and surrounds the pedestal. The semiconductor die is placed on the pedestal, which reduces the length of the wires joining the die to the leads of the air cavity package.