An electronic module comprises a substrate 11, 21, an other-side electronic component 18, 23 provided on the other side of the substrate 11, 21, a one-side electronic component 13, 28 provided on one side of the substrate 11, 21 and a connecting terminal 115, 125 having an other-side extending part 119a, 129a extending to circumferential outside of the substrate 11, 21 on the other side of the substrate 11, 21, a one-side extending part 119b, 129b extending to circumferential outside of the substrate 11, 21 on one side of the substrate 11, 21, and a connecting part 118, 128 connecting the other-side extending part 119a, 129a with the one-side extending part 119b, 129b at the circumferential outside of the substrate 11, 21.

An apparatus is provided, comprising a substrate with a frontside and a backside opposite the frontside; control circuitry disposed over the frontside of the substrate; a memory array disposed over and electrically coupled to the control circuitry; a through-silicon via (TSV) disposed under the memory array, the TSV extending through the substrate from the control circuitry to the backside of the substrate; and a bond pad disposed on the backside of the substrate and electrically coupled to the control circuitry via the TSV.

Techniques and mechanisms for promoting heat conduction in a packaged device using a heat spreader that is fabricated by a build-up process. In an embodiment, 3D printing of a heat spreader successively deposit layers of a thermal conductor material, where said layers variously extend each over a respective one or more IC dies. The heat spreader forms a flat top side, wherein a bottom side of the heat spreader extends over, and conforms at least partially to, different respective heights of various IC dies. In another embodiment, fabrication of a portion of the heat spreader comprises printing pore structures that contribute to a relatively low thermal conductivity of said portion. An average orientation of the oblong pores contributes to different respective thermal conduction properties for various directions of heat flow.

A method for interconnecting components of an electronic system includes depositing a sintering solution onto a first component to form an interconnection layer, the sintering solution having metal nanoparticles dispersed in a solvent, and a stabilizing agent adsorbed onto the nanoparticles. The nanoparticles have for more than 95.0% of their mass a metal selected from silver, gold, copper and alloys thereof and have a polyhedral shape with an aspect ratio of more than 0.8. The method also includes eliminating, at least partially, solvent from the layer to form an agglomerate in which the stabilizing agent binds nanoparticles together and maintains at least a portion of the nanoparticles at a distance from each other; debinding and sintering the layer by bringing the agglomerate into contact with a destabilizing agent to aggregate and coalesce the nanoparticles and depositing a second component in contact with the layer before or during debinding or sintering.

Some embodiments include a method of forming an integrated assembly. Semiconductor material is patterned into a configuration which includes a set of first upwardly-projecting structures spaced from one another by first gaps, and a second upwardly-projecting structure spaced from the set by a second gap. The second gap is larger than the first gaps. Conductive material is formed along the first and second upwardly-projecting structures and within the first and second gaps. First and second segments of protective material are formed over regions of the conductive material within the second gap, and then an etch is utilized to pattern the conductive material into first conductive structures within the first gaps and into second conductive structures within the second gap. Some embodiments include integrated assemblies.

A method includes etching a through-substrate via (TSV) in a substrate from a backside of the substrate. The substrate has a device layer on a frontside. The method further includes depositing a conformal spacer layer on the backside of the substrate, and sidewalls and a bottom of the TSV, and etching the spacer layer to form a self-aligned mask for etching a contact opening at the bottom of TSV to a metal pad in the device layer, and etching the contact opening at the bottom of TSV to the metal pad in the device layer. The method further includes disposing a conductive material layer in the TSV and the contact opening to make a vertical interconnection from the backside of the substrate to the metal pad in the device layer.

An electronic device module includes a substrate, at least one first component and at least one second component disposed on one surface of the substrate, a shielding wall disposed between the at least one first component and the at least one second component, and disposed on the substrate, and a sealing portion having the at least one first component, the at least one second component and the shielding wall embedded therein, and disposed on the substrate. The shielding wall includes at least one insulating layer and at least one conductive layer disposed on the insulating layer.

A metal heat slug having an upper and lower surface is provided. First and second electrically conductive leads are provided. First and second electrically insulating fastening mechanisms are provided. The first and second fastening mechanisms are adhered to the upper surface of the heat slug in an outer peripheral region of the heat slug such that the first and second leads are vertically separated from and electrically insulated from the heat slug. The central die attach region is exposed from the first and second fastening mechanisms after adhering the first and second fastening mechanisms to the upper surface of the heat slug.

A semiconductor package device includes a substrate, an electronic component, a bonding wire, a heat spreader, a thermal conductive structure and an encapsulant. The electronic component is disposed on the substrate. The bonding wire connects the electronic component to the substrate. The heat spreader is disposed over the electronic component. The thermal conductive structure is disposed between the heat spreader and the electronic component. The thermal conductive structure includes two polymeric layers and a thermal conductive layer. The conductive layer is disposed between the two polymeric layers. The thermal conductive layer has a first end in contact with the electronic component and a second end in contact with the heat spreader. The encapsulant covers the bonding wire.

A substrate arrangement includes: a first metallization layer, nanowires arranged on a surface of the first metallization layer; and a component arranged on the first metallization layer such that a first subset of the nanowires is arranged between the first metallization layer and the component. The nanowires are evenly distributed over a section of the surface area or over the entire surface area of the first metallization layer. Each nanowire includes first and second ends. The first end of each nanowire is inseparably connected to the surface of the first metallization layer. The second end of each nanowire of the first subset is inseparably connected to a surface of one of the component such that the first subset of nanowires forms a permanent connection between the first metallization layer and the component. There are fewer nanowires in the first subset of nanowires than there are total nanowires.