A problem is to provide a sheet having a pre-sintering layer, the thickness of which following sintering is such as to be capable of relieving stresses. Solution means relate to a sheet comprising a pre-sintering layer. Viscosity at 90° C. of the pre-sintering layer is not less than 0.27 MPa.Math.s. Thickness of the pre-sintering layer is 30 μm to 200 μm.

A problem is to provide a sheet having a pre-sintering layer, the thickness of which following sintering is such as to be capable of relieving stresses. Solution means relate to a sheet comprising a pre-sintering layer. Viscosity at 90° C. of the pre-sintering layer is not less than 0.27 MPa.Math.s. Thickness of the pre-sintering layer is 30 μm to 200 μm.

An embodiment of a sensor device includes a base substrate, a circuit pattern formed overlying the interior surface of the substrate, a physiological characteristic sensor element on the exterior surface of the substrate, conductive plug elements located in vias formed through the substrate, each conductive plug element having one end coupled to a sensor electrode, and having another end coupled to the circuit pattern, a multilayer component stack carried on the substrate and connected to the circuit pattern, the stack including features and components to provide processing and wireless communication functionality for sensor data obtained in association with operation of the sensor device, and an enclosure structure coupled to the substrate to enclose the interior surface of the substrate, the circuit pattern, and the stack.

An embodiment of a sensor device includes a base substrate, a circuit pattern formed overlying the interior surface of the substrate, a physiological characteristic sensor element on the exterior surface of the substrate, conductive plug elements located in vias formed through the substrate, each conductive plug element having one end coupled to a sensor electrode, and having another end coupled to the circuit pattern, a multilayer component stack carried on the substrate and connected to the circuit pattern, the stack including features and components to provide processing and wireless communication functionality for sensor data obtained in association with operation of the sensor device, and an enclosure structure coupled to the substrate to enclose the interior surface of the substrate, the circuit pattern, and the stack.

A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a substrate, a semiconductor device, a ring structure, a lid structure, and an adhesive member. The semiconductor device is disposed over the substrate. The ring structure is disposed over the substrate and surrounds the semiconductor device. The lid structure is disposed over the ring structure and extends across the semiconductor device. The adhesive member is disposed in a gap between the ring structure and the semiconductor device and attached to the lid structure and the substrate.

A semiconductor device package and a method of forming the same are provided. The semiconductor device package includes a substrate, a semiconductor device, a ring structure, a lid structure, and an adhesive member. The semiconductor device is disposed over the substrate. The ring structure is disposed over the substrate and surrounds the semiconductor device. The lid structure is disposed over the ring structure and extends across the semiconductor device. The adhesive member is disposed in a gap between the ring structure and the semiconductor device and attached to the lid structure and the substrate.

A semiconductor device, including a substrate having an insulating plate and a conductive plate formed on the insulating plate, a semiconductor chip formed on the conductive plate, a contact part arranged on the conductive plate with a bonding member therebetween, a rod-shaped external connection terminal having a lower end portion thereof fitted into the contact part, and a lid plate having a front surface and a back surface facing the substrate. An insertion hole pierces the lid plate, forming an entrance and exit respectively on the back and front surfaces of the lid plate. The external connection terminal is inserted in the insertion hole. The semiconductor device has at least one of a guide portion with an inclined surface, fixed to a portion of the external connection terminal located in the insertion hole, or an inclined inner wall of the insertion hole.

A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.

A semiconductor device includes a package and a cooling cover. The package includes a first die having an active surface and a rear surface opposite to the active surface. The rear surface has a cooling region and a peripheral region enclosing the cooling region. The first die includes micro-trenches located in the cooling region of the rear surface. The cooling cover is stacked on the first die. The cooling cover includes a fluid inlet port and a fluid outlet port located over the cooling region and communicated with the micro-trenches.

A mounting device comprises a substrate stage, a mounting head, an elevating unit, a recognition mechanism, and a control unit. The recognition mechanism acquires position information about a chip recognition mark and a substrate recognition mark using an imaging unit. The control unit calculates an amount of positional deviation between a chip component and a substrate from the position information about the chip recognition mark and the substrate recognition mark, and performs alignment by driving the mounting head and/or the substrate stage according to the amount of the positional deviation. The chip component and the substrate are brought closer with each other and the alignment is performed in a state in which the imaging unit simultaneously images the chip recognition mark and the substrate recognition mark within a depth of field, after which the chip component and the substrate are brought into close contact with each other.