A package structure and a formation method of a package structure are provided. The method includes forming a conductive structure over a carrier substrate. The conductive structure has a lower portion and an upper portion, and the upper portion is wider than the lower portion. The method also includes disposing a semiconductor die over the carrier substrate. The method further includes forming a protective layer to surround the conductive structure and the semiconductor die. In addition, the method includes forming a conductive bump over the conductive structure. The lower portion of the conductive structure is between the conductive bump and the upper portion of the conductive structure.

A packaged electronic device includes a substrate comprising a die pad and a lead spaced apart from the die. An electronic device is attached to the die pad top side. A conductive clip is connected to the substrate and the electronic device, and the conductive clip comprises a plate portion attached to the device top side with a conductive material, a clip connecting portion connected to the plate portion and the lead, and channels disposed to extend inward from a lower side of the plate portion above the device top side. The conductive material is disposed within the channels. In another example, the plate portion comprises a lower side having a first sloped profile in a first cross-sectional view such that an outer section of the first sloped profile towards a first edge portion of the plate portion is spaced away from the electronic device further than an inner section of the first sloped profile towards a central portion of the plate portion. Other examples and related methods are also disclosed herein.

Various semiconductor chip devices and methods of making the same are disclosed. In one aspect, an apparatus is provided that includes a first redistribution layer (RDL) structure having a first plurality of conductor traces, a first molding layer on the first RDL structure, plural conductive pillars in the first molding layer, each of the conductive pillars including a first end and a second end, a second RDL structure on the first molding layer, the second RDL structure having a second plurality of conductor traces, and wherein some of the conductive pillars are electrically connected between some of the first plurality of conductor traces and some of the second plurality of conductor traces to provide a first inductor coil.

In an embodiment, a device includes: a semiconductor die including a semiconductor material; a through via adjacent the semiconductor die, the through via including a metal; an encapsulant around the through via and the semiconductor die, the encapsulant including a polymer resin; and an adhesion layer between the encapsulant and the through via, the adhesion layer including an adhesive compound having an aromatic compound and an amino group, the amino group bonded to the polymer resin of the encapsulant, the aromatic compound bonded to the metal of the through via, the aromatic compound being chemically inert to the semiconductor material of the semiconductor die.

In an embodiment, a device includes: a semiconductor die including a semiconductor material; a through via adjacent the semiconductor die, the through via including a metal; an encapsulant around the through via and the semiconductor die, the encapsulant including a polymer resin; and an adhesion layer between the encapsulant and the through via, the adhesion layer including an adhesive compound having an aromatic compound and an amino group, the amino group bonded to the polymer resin of the encapsulant, the aromatic compound bonded to the metal of the through via, the aromatic compound being chemically inert to the semiconductor material of the semiconductor die.

A method includes forming a first electrically conductive layer on a first side of a dielectric insulation layer, forming a structured mask layer on a side of the first electrically conductive layer that faces away from the dielectric insulation layer, forming at least one trench in the first electrically conductive layer, said at least one trench extending through the entire first electrically conductive layer to the dielectric insulation layer, forming a coating which covers at least the bottom and the side walls of the at least one trench, and removing the mask layer after the coating has been formed.

A method includes forming a first electrically conductive layer on a first side of a dielectric insulation layer, forming a structured mask layer on a side of the first electrically conductive layer that faces away from the dielectric insulation layer, forming at least one trench in the first electrically conductive layer, said at least one trench extending through the entire first electrically conductive layer to the dielectric insulation layer, forming a coating which covers at least the bottom and the side walls of the at least one trench, and removing the mask layer after the coating has been formed.

A radiofrequency device includes a buried insulation layer, a transistor, a contact structure, a connection bump, an interlayer dielectric layer, and a mold compound layer. The buried insulation layer has a first side and a second side opposite to the first side in a thickness direction of the buried insulation layer. The transistor is disposed on the first side of the buried insulation layer. The contact structure penetrates the buried insulation layer and is electrically connected with the transistor. The connection bump is disposed on the second side of the buried insulation layer and electrically connected with the contact structure. The interlayer dielectric layer is disposed on the first side of the buried insulation layer and covers the transistor. The mold compound layer is disposed on the interlayer dielectric layer. The mold compound layer may be used to improve operation performance and reduce manufacturing cost of the radiofrequency device.

In one example, a semiconductor device structure relates to an electronic device, which includes a device top surface, a device bottom surface opposite to the device top surface, device side surfaces extending between the device top surface and the device bottom surface, and pads disposed over the device top surface. Interconnects are connected to the pads, and the interconnects first regions that each extend from a respective pad in in an upward direction, and second regions each connected to a respective first region, wherein each second region extends from the respective first region in a lateral direction. The interconnects comprise a redistribution pattern on the pads. Other examples and related methods are also disclosed herein.

In one example, a semiconductor device structure relates to an electronic device, which includes a device top surface, a device bottom surface opposite to the device top surface, device side surfaces extending between the device top surface and the device bottom surface, and pads disposed over the device top surface. Interconnects are connected to the pads, and the interconnects first regions that each extend from a respective pad in in an upward direction, and second regions each connected to a respective first region, wherein each second region extends from the respective first region in a lateral direction. The interconnects comprise a redistribution pattern on the pads. Other examples and related methods are also disclosed herein.