A semiconductor device according to the disclosure includes a substrate, a semiconductor chip provided on the substrate, a nut, a lead frame provided on the semiconductor chip and the nut and screwed to the nut, a nut box accommodating the nut and having an opening which exposes the nut downward formed in a bottom portion and solder provided at least between the semiconductor chip and the substrate or the lead frame.

Embodiments of the invention include an electrical package and methods of forming the package. In one embodiment, a transformer may be formed in the electrical package. The transformer may include a first conductive loop that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first conductive loop from a second conductive loop that is formed in the package. Additional embodiments of the invention include forming a capacitor formed in the electrical package. For example, the capacitor may include a first capacitor plate that is formed over a first dielectric layer. A thin dielectric spacer material may be used to separate the first capacitor plate form a second capacitor plate that is formed in the package. The thin dielectric spacer material in the transformer and capacitor allow for increased coupling factors and capacitance density in electrical components.

A method for manufacturing a package substrate, includes: providing a glass frame having a through hole and a chip embedding cavity; fixing an electronic component in the chip embedding cavity; coating a dielectric layer to an upper surface of the glass frame, the through hole and the chip embedding cavity and curing the dielectric layer; photoetching the dielectric layer to form an opening window arranged above the through hole; depositing metal through the opening window and patterning the metal to form a metal pillar and a circuit layer, the metal pillar passing through the through hole, the circuit layer being arranged on the upper surface and/or a lower surface of the glass frame and being connected to the electronic component and the metal pillar; forming a solder mask on a surface of the circuit layer, patterning the solder mask to form a pad connected to the circuit layer.

A conductor trace structure reducing insertion loss of circuit board, the circuit board laminates an outer layer circuit board, an inner layer circuit board and a glass fiber resin films which arranged between each board; before laminated process, the conductor traces of the inner layers had formed by etching of imaging transfer process and conductor traces had been roughed process for making the glass fiber resin films having good adhesive performance during laminating; before etching of imaging transfer process that forms the conductor traces of the outer layers or solder resist coat process or coating polymer materials, the conductor traces have been roughed process to make insulating resin layer of the solder resist coat or polymer materials to has better associativity; wherein a smooth trench is formed by physical or chemical process constructed on the roughed conductor traces surface to guide electric ions transmitted on these smooth trench surface to enhance electric ions transmission rate, resulting in reducing the impedance so as to achieve reducing insertion loss.

Described examples include a microelectronic device with a high voltage capacitor that includes a high voltage node, a low voltage node, a first dielectric disposed between the low voltage node and the high voltage node, a first conductive plate disposed between the first dielectric and the high voltage node, and a second dielectric disposed between the first conductive plate and the high voltage node.

Disclosed is a field device of automation technology comprising a measuring transducer for ascertaining a measurement signal and a measurement transmitter for output of the measurement signal ascertained. The field device has at least one housing of the measuring transducer and/or of the measurement transmitter, in which electronic components of the measuring transducer and/or of the measurement transmitter are arranged, characterized in that the electronic components are embedded in an epoxide polymer foam, which is a reaction product of a self foaming, potting compound comprising at least the following components: 25 to 75 wt-% of a diglycidyl ether resin; at least one amine containing hardening system comprising a Mannich base; and at least one foaming agent, and a method for manufacturing a field device of automation technology.

Disclosed is an antenna apparatus including a substrate having a cavity in a first outer surface thereof. The substrate has a sidewall defining a portion of the cavity, and a first edge contact is formed at the sidewall. An IC chip is disposed within the cavity and has a side surface facing the sidewall and a second edge contact formed on the side surface electrically connected to the first edge contact. An antenna element, disposed at a second outer surface of the substrate opposite the first outer surface, is electrically connected to RF circuitry within the IC chip through a conductive via extending within the substrate.

Describes are shutter disks comprising one or more of titanium (Ti), barium (Ba), or cerium (Ce) for physical vapor deposition (PVD) that allows pasting to minimize outgassing and control defects during etching of a substrate. The shutter disks incorporate getter materials that are highly selective to reactive gas molecules, including O.sub.2, CO, CO.sub.2, and water.

An illumination source disposed in a housing of a tool without the need for fasteners or snaps. The illumination source includes a number illumination elements, such as LEDs, disposed on a circuit board. A lens and the housing cooperatively direct light emitted by the illumination elements away from a user's eyes during use of the tool.

A method of manufacturing a semiconductor device includes preparing a first semiconductor substrate comprising a first semiconductor substrate body, a first electrode, and a first organic insulation film having a surface roughness Ra of 2.0 nm or less, in which the first electrode and the first organic insulation film are provided on one surface of the first semiconductor substrate body, preparing a second semiconductor substrate comprising a second semiconductor substrate body, a second electrode, and a second organic insulation film having a surface roughness Ra of 2.0 nm or less, in which the second electrode and the second organic insulation film are provided on one surface of the second semiconductor substrate body, performing lamination of the first organic insulation film and the second organic insulation film at 70 C. or less, and performing joining of the first electrode and the second electrode.