A bonding apparatus configured to bond a first substrate and a second substrate includes a first holder configured to hold the first substrate; a second holder configured to hold the second substrate; a first imaging device provided at the first holder and configured to image the second substrate held by the second holder; a first light irradiating device provided at the first holder and configured to irradiate light to the second substrate when the second substrate is imaged; a second imaging device provided at the second holder and configured to image the first substrate held by the first holder; and a second light irradiating device provided at the second holder and configured to irradiate light to the first substrate when the first substrate is imaged. Each of the first light irradiating device and the second light irradiating device is connected to a first light source configured to irradiate white light.

Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.

Disclosed are an underfill method and apparatus for a semiconductor package, the underfill method includes loading a substrate; charging a filler to be filled in between the substrate and a device; applying the filler to the substrate; and subjecting the applied filler to an electric field.

A space-grade solar array includes relatively small cells with integrated wiring embedded into or incorporated directly onto a printed circuit board. The integrated wiring provides an interface for solar cells having back side electrical contacts. The single side contacts enable the use of pick and place (PnP) technology in manufacturing the space-grade solar array. The solar cell is easily and efficiently packaged and electrically interconnected with other solar cells on a solar panel such as by using PnP process. The back side contacts are matched from a size and positioning standpoint to corresponding contacts on the printed circuit board.

Discussed is an apparatus for self-assembling semiconductor light-emitting devices, the apparatus including a fluid chamber to accommodate the semiconductor light-emitting devices, each semiconductor light-emitting device having a magnetic body; a magnet to apply a magnetic force to the semiconductor light-emitting devices while an assembly substrate is disposed at an assembly position of the self-assembly apparatus; a power supply to induce formation of an electric field on the assembly substrate to allow the semiconductor light-emitting devices to be seated at a preset positions on the assembly substrate in a process of moving the semiconductor light-emitting devices due to a change in a position of the magnet; and a fluid injector to shoot a fluid to some of the semiconductor light-emitting devices to allow the some of the semiconductor light-emitting devices seated on the assembly substrate to be separated from the assembly substrate.

A method of placing light emitting diodes (LEDs) includes embedding an array of LEDs in a polymer layer on a substrate. The method includes detaching at least one LED in the array of LEDs from the substrate by dry-etching the polymer layer in which at least one LED is embedded. A pick-up-tool (PUT) is brought into contact with at least one surface of at least one LED facing away from the substrate, responsive to dry-etching the polymer layer. The PUT is lifted with the at least one LED attached to the PUT.

A forming apparatus forming a composition on a substrate by using a mold, includes a supplier configured to supply a composition on the substrate, a plurality of processors including a first processor and a second processor, each of the plurality of processors being configured to bring the mold into contact with the composition supplied onto the substrate by the supplier, and a substrate conveyer configured to convey the substrate onto which the composition is supplied by the supplier to the first processor and then convey other substrate onto which the composition is supplied following the substrate to the second processor.

Systems and methods of securing an integrated circuit assembly includes: arranging a plurality of securing elements within a plurality of orifices fabricated within one or more layer components of a plurality of layer components of an integrated circuit assembly; applying a mechanical compression load against the integrated circuit assembly that uniformly compresses together the plurality of layer components of the integrated circuit assembly; after applying the mechanical compression load to the integrated circuit assembly, fastening the plurality of securing elements while the integrated circuit assembly is in a compressed state based on the mechanical compression load; and terminating the application of the mechanical compression load against the integrated circuit assembly based on the fastening of the plurality of securing elements.

A space-grade solar array includes relatively small cells with integrated wiring embedded into or incorporated directly onto a printed circuit board. The integrated wiring provides an interface for solar cells having back side electrical contacts. The single side contacts enable the use of pick and place (PnP) technology in manufacturing the space-grade solar array. The solar cell is easily and efficiently packaged and electrically interconnected with other solar cells on a solar panel such as by using PnP process. The back side contacts are matched from a size and positioning standpoint to corresponding contacts on the printed circuit board.

A method of fabricating a semiconductor package using a laminating device is provided. The method includes placing a substrate on a substrate stand; providing a pressurizing unit which is expandable and includes a convex surface facing an upper surface of the substrate stand, on the substrate stand; injecting air into the pressurizing unit using a plate which is connected to the pressurizing unit; and supplying a film by a film supply unit which supplies the film between the substrate stand and the pressurizing unit, wherein the pressurizing unit attaches the film onto the substrate, while expanding.