A reactor system with stuck lift pin detection. The system includes a reaction chamber, a susceptor for supporting wafers in an interior space of the reaction chamber, and an elevator for raising and lowering the susceptor in the interior space. Further, the system includes a lift pin supported by and extending vertically through the susceptor to travel between an up and a down position with movements of the susceptor by the elevator, and a landing pad is provided in the system for receiving a base of the lift pin when the lift pin is in the down position. Significantly, the system also includes a sensor assembly with a sensor positioned at least partially within the interior space of the reaction chamber. An output signal of the sensor is indicative of whether the lift pin is sticking or seizing during travel through the susceptor.

A multi-zone heater with a plurality of thermocouples such that different heater zones can be monitored for temperature independently. The independent thermocouples may have their leads routed out from the shaft of the heater in a channel that is closed with a joining process that results in hermetic seal adapted to withstand both the interior atmosphere of the shaft and the process chemicals in the process chamber. The thermocouple and its leads may be enclosed with a joining process in which a channel cover is brazed to the heater plate with aluminum.

In an embodiment, a method includes performing a first atomic layer deposition (ALD) process to form a first material layer over a first blank wafer, the first ALD process comprising: performing a first precursor sub-cycle using a first precursor; performing a first purge sub-cycle using a inert gas; and performing a second precursor sub-cycle using a second precursor and the inert gas; and performing a second purge sub-cycle for a first duration over a second blank wafer different from the first blank wafer using the inert gas to deposit first defects onto the second blank wafer.

A substrate support assembly suitable for use in a reactor including a common processing and substrate transfer region is disclosed. The substrate support assembly includes a susceptor and one or more lift pins that can be used to lower a substrate onto a surface of the susceptor and raise the substrate from the surface, to allow transfer of the substrate from the processing region, without raising or lowering the susceptor.

The present invention relates to a temperature control device for a chemical liquid used in a semiconductor manufacturing process, which is located on a chemical liquid circulating and supplying tube to control a temperature of the chemical liquid. The device includes: a first heat sink having a cooling water flow path formed therein; a plurality of thermoelectric modules coming into contact with both side surfaces of the first heat sink, respectively; and a second heat sink coming into contact with the thermoelectric modules, while placing the first heat sink between the thermoelectric modules, and having a plurality of chemical liquid flow path tubes adapted to flow the chemical liquid therealong.

A mounting table is provided. The mounting table includes a base having a first flow path, a recess, and a second flow path connected to the recess, and a variable control mechanism configured to variably control a contact area between a target object disposed on the base and a mounting surface for mounting thereon the target object by filling and discharging fluid into and from the recess through the second flow path.

A substrate pedestal includes a thermally conductive substrate support including a mesh, a thermally conductive shaft including a plurality of conductive rods therein, each conductive rod having a first end and a second end, and a sensor. The first end of each conductive rod is electrically coupled to the mesh, and the sensor is disposed between the first and second ends of each conductive rod and configured to detect current flow through each conductive rod.

The present disclosure generally relates to an epitaxial chamber for processing of semiconductor substrates. In one example, the epitaxial chamber has a chamber body assembly. The chamber body assembly includes a lower window and an upper window, wherein chamber body assembly, the lower window and the upper window enclose an internal volume. A susceptor assembly is disposed in the internal volume. The epitaxial chamber also has a plurality of temperature control elements. The plurality of temperature control elements include one or more of an upper lamp module, a lower lamp module, an upper heater, a lower heater, or a heated gas passage.

A plasma processing apparatus includes a stage for supporting a target object in a chamber defined by a chamber body. The stage includes a lower electrode, an electrostatic chuck provided on the lower electrode, heaters provided in the electrostatic chuck, and terminals electrically connected to the heaters. A conductor pipe electrically connects a high frequency power supply and the lower electrode and extends from the lower electrode to the outside of the chamber body. Power supply lines supply power from a heater controller to the heaters. Filters partially forming the power supply lines prevent the inflow of high frequency power from the heaters to the heater controller. The power supply lines include wirings which respectively connect the terminals and the filters and extend to the outside of the chamber body through an inner bore of the conductor pipe.

A semiconductor wafer is preheated with a halogen lamp, and then is heated by irradiation with a flash of light emitted from a flash lamp. The preheating with the halogen lamp is continued for a short time even after the flash lamp turns off. A radiation thermometer measures a front surface temperature and a back surface temperature of the semiconductor wafer. A temperature integrated value is calculated by integration of temperatures of the semiconductor wafer measured during a period from a start of the flash irradiation to an end of the heating of the semiconductor wafer. It is determined that the semiconductor wafer is cracked at the time of flash irradiation when the calculated temperature integrated value deviates from a preset range between an upper limit value and a lower limit value.