H01L21/67276

MATERIAL PROCESSING PATH SELECTION METHOD AND DEVICE
20220187807 · 2022-06-16 ·

A material processing path selection method includes calculating a plurality of candidate material processing paths, determining a bottleneck process tank, and for each of the plurality of candidate material processing paths, calculating a bottleneck process tank utilization rate to select a candidate material processing path with a highest bottleneck process tank utilization rate in the plurality of candidate material processing paths as a target material processing path. The bottleneck process tank is a process tank having a highest use frequency among all process tanks, A use frequency of the process tank is equal to a total process time length of all materials that need to be transferred to the process tank divided by a number of all the materials that need to be transferred to the process tank.

In-Situ Metrology And Process Control

Methods and apparatus for the in-situ measurement of metrology parameters are disclosed herein. Some embodiments of the disclosure further provide for the real-time adjustment of process parameters based on the measure metrology parameters. Some embodiments of the disclosure provide for a multi-stage processing chamber top plate with one or more sensors between process stations.

Tin oxide mandrels in patterning

Tin oxide films are used as mandrels in semiconductor device manufacturing. In one implementation the process starts by providing a substrate having a plurality of protruding tin oxide features (mandrels) residing on an exposed etch stop layer. Next, a conformal layer of spacer material is formed both on the horizontal surfaces and on the sidewalls of the mandrels. The spacer material is then removed from the horizontal surfaces exposing the tin oxide material of the mandrels, without fully removing the spacer material residing at the sidewalls of the mandrel (e.g., leaving at least 50%, such as at least 90% of initial height at the sidewall). Next, mandrels are selectively removed (e.g., using hydrogen-based etch chemistry), while leaving the spacer material that resided at the sidewalls of the mandrels. The resulting spacers can be used for patterning the etch stop layer and underlying layers.

MODEL-BASED SCHEDULING FOR SUBSTRATE PROCESSING SYSTEMS

For etching tools, a neural network model is trained to predict optimum scheduling parameter values. The model is trained using data collected from preventive maintenance operations, recipe times, and wafer-less auto clean times as inputs. The model is used to capture underlying relationships between scheduling parameter values and various wafer processing scenarios to make predictions. Additionally, in tools used for multiple parallel material deposition processes, a nested neural network based model is trained using machine learning. The model is initially designed and trained offline using simulated data and then trained online using real tool data for predicting wafer routing path and scheduling. The model improves accuracy of scheduler pacing and achieves highest tool/fleet utilization, shortest wait times, and fastest throughput.

HIGH DENSITY, CONTROLLED INTEGRATED CIRCUITS FACTORY
20220171370 · 2022-06-02 ·

A high density, controlled integrated circuits factory having process modules occupying approximately two-thirds of the factory floor space with the remaining one-third of the factory floor space being used for servicing the process modules and for loading and unloading wafers to and from the process modules. A subfloor is provided below the factory floor to allow service lifts to travel across the factory. Service lifts can be raised to the factory floor level to service process modules. Overhead lines are also provided over the process modules to transport service items as well as wafers across the factory.

Enhancement of yield of functional microelectronic devices

Described herein are techniques related to a semiconductor fabrication process that facilitates the enhancement of systemic conformities of patterns of the fabricated semiconductor wafer. A semiconductor wafer with maximized systemic conformities of patterns will maximize the electrical properties and/or functionality of the electronic devices formed as part of the fabricated semiconductor wafer. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Article transport facility

A control unit that controls a transport apparatus executes selection control to select one accommodation portion as a selected accommodation portion, movement control to control the transport apparatus so as to move a transport support portion to a corresponding position, determination control to determine whether or not a detection target portion is detected by a detecting portion, transfer control to control the transport apparatus so as to transfer an article from the transport support portion to an accommodation support member, and update setting control to set the selected accommodation portion and related accommodation portions as prohibited accommodation portions if it is determined, in the determination control, that the detection target portion is not detected, and after the update setting control, the control unit again executes the selection control to newly select a selected accommodation portion, and executes the movement control so as to move the transport support portion to a corresponding position corresponding to the newly selected accommodation portion.

Gas cushion apparatus and techniques for substrate coating

A method of forming a material layer on a substrate comprises loading a substrate into a printing zone of a coating system using a substrate handler, printing an organic ink material on a substrate while the substrate is located in the printing zone, transferring the substrate from the printing zone to a treatment zone of the coating system, treating the organic ink material deposited on the substrate in the treatment zone to form a film layer on the substrate, and removing the substrate from the treatment zone using the substrate handler.

SEMICONDUCTOR MANUFACTURING DEVICE, WAFER CONVEYANCE SYSTEM, WAFER CONVEYANCE METHOD, AND NON-TRANSITORY COMPUTER READABLE MEDIUM FOR WAFER CONVEYANCE SYTEM
20230274963 · 2023-08-31 · ·

A semiconductor manufacturing device includes a first conveyance unit; a processing unit in contact with the first conveyance unit; a conveyance module provided in the first conveyance unit and including an arm driving unit and an arm supporting unit; and a conveyance arm including a first conveyance module and a second conveyance module that can be driven independently. The first conveyance module and the second conveyance module can be physically combined with and/or separated from each other.

TRANSFER DEVICE AND CEILING CARRIER
20220157631 · 2022-05-19 ·

A transfer device includes a controller configured or programmed to perform at least one of a first control to make a maximum acceleration when moving a FOUP to a front end side smaller than a maximum acceleration when moving to a back end side, a second control to make a maximum deceleration when moving the FOUP to the front end side greater than a maximum deceleration when moving to the back end side, a third control to make the absolute value of the maximum deceleration when moving the FOUP to the front end side greater than the absolute value of the maximum acceleration, and a fourth control to make the absolute value of the maximum acceleration when moving the FOUP to the back end side greater than the absolute value of the maximum deceleration.