Patent classifications
H01L21/67276
METHOD TO ELIMINATE FIRST WAFER EFFECTS ON SEMICONDUCTOR PROCESS CHAMBERS
Embodiments disclosed herein include methods for monitoring chamber performance in order to mitigate first wafer effects. In an embodiment, a method for determining an optimum chamber condition comprises monitoring a parameter during execution of a recipe for a number of substrates after the chamber has been in an idle state. In an embodiment, the method further comprises determining when a repeatability of the parameter meets a stability specification. In an embodiment, the method may continue with recording the parameter.
APPARATUS AND METHODS FOR REDUCING SUBSTRATE COOL DOWN TIME
A method and apparatus for reducing cool-down times within a cool-down chamber are described herein. The method and apparatus include a process chamber, a transfer chamber, a dual-handled transfer robot within the transfer chamber, and a cool-down chamber. The dual-handled transfer robot it utilized to transfer a substrate between the process chamber and the cool-down chamber. The amount of time the substrate is disposed on the dual-handled transfer robot before being moved into the cool-down chamber is multiplied by a correction factor and subtracted from an original cool down time to achieve an adjusted cool down time. The adjusted cool down time is determined separately for each substrate being cooled within the cool-down chamber.
APPARATUS FOR TREATING A SUBSTRATE
The inventive concept provides a substrate treating apparatus. The substrate treating apparatus includes a process chamber configured to treat a substrate; a transfer assembly configured to transfer the substrate to the process chamber; and a diagnosis unit configured to detect an abnormal state of the transfer assembly, and wherein the transfer assembly comprises: a housing having a transfer space; and a transfer robot configured to transfer the substrate to the process chamber, and wherein the diagnosis unit comprises: a detection member for detecting an air vibration generated within the housing; and a diagnosis member for diagnosing a driving unit of the transfer assembly based on the air vibration detected by the detection member.
METROLOGY METHOD AND SYSTEM
A metrology method for use in determining one or more parameters of a patterned structure, the method including providing raw measured TEM image data, TEM.sub.meas, data indicative of a TEM measurement mode, and predetermined simulated TEM image data including data indicative of one or more simulated TEM images of a structure similar to the patterned structure under measurements and a simulated weight map including weights assigned to different regions in the simulated TEM image corresponding to different features of the patterned structure, performing a fitting procedure between the raw measured TEM image data and the predetermined simulated TEM image data and determining one or more parameters of the structure from the simulated TEM image data corresponding to a best fit condition.
SYSTEM AND METHOD FOR AUTOMATED MATERIAL HANDLING MANAGEMENT
An AMHS interface management system configured to facilitate the exchange of lot information between distinct AMHS systems. The AMHS interface management system receives lot information from a first AMHS system in a first format and translates the lot information into a format associated with a second AMHS system. The AMHS interface management system utilizes a handshake area located between the first and second AMHS systems. The handshake area includes one or more vehicles that facilitate the movement of a lot between the first AMHS system and the second AMHS system.
ECO-EFFICIENCY (SUSTAINABILITY) DASHBOARD FOR SEMICONDUCTOR MANUFACTURING
A method including receiving, by a processing device, a first selection of at least one of a first fabrication process or first manufacturing equipment to perform manufacturing operations of the first fabrication process. The method can further include inputting the first selection into a digital replica of the first manufacturing equipment wherein the digital replica outputs physical conditions of the first fabrication process. The method may further include determining environmental resource usage data indicative of a first environmental resource consumption of the first fabrication process run on the first manufacturing equipment based on the physical conditions of the first fabrication process. The processing device may further determine a modification to the first fabrication process that reduces the environmental resource consumption of the first fabrication process run on the first manufacturing equipment. The method can further include performing at least one of applying the modification to the first fabrication.
Semiconductor process analysis device, semiconductor process analysis method, and storage medium
A semiconductor process analysis device of an embodiment includes a memory and a processor connected to the memory. The processor performs factoring to inspection result groups resulting from inspections of a substrate group, the inspections including an inspection of a fabrication process of a semiconductor integrated circuit. The inspection result groups are first distribution groups resulting from a single inspection of each substrate of the substrate group. Each first distribution represents a distribution of inspection data on a substrate surface. The factoring includes calculating, from the first distribution groups, for each of one or more second distributions, appearance information containing a degree of appearance of one of the one or more second distributions in each substrate. The processor calculates a degree of association between two items of the appearance information, the two items respectively corresponding to different inspection result groups among the inspection result groups.
METHOD OF MEASURING RESISTIVITY, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, RECORDING MEDIUM, AND RESISTIVITY MEASURING DEVICE
There is provided a technique that includes (a) receiving a recipe for measuring an object to be measured; (b) calculating an estimated time when measuring the object according to a setting order of respective measurement points set in the recipe; (c) changing the setting order of the respective measurement points set in the recipe according to a measurement pattern for measuring the object and calculating an estimated time when measuring the object according to the changed setting order; (d) selecting the setting order in which the estimated time is the shortest among the estimated times calculated in (b) and (c); and (e) measuring the object in the selected setting order.
SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD
A substrate processing apparatus includes: a group of modules including a plurality of processing modules that process a substrate and a plurality of relay modules on which the substrates are disposed to be transferred among the plurality of processing modules; a plurality of transfer mechanisms that transfer the substrates in an assigned section of a transfer path; a shared transfer mechanism shared for transfer in a first section and a second section separated from each other in the transfer path of the substrate; and a determination unit that determines a transfer destination of the substrates by the shared transfer mechanism between the first relay module and the second relay module based on a transfer status of the substrate in each section.
Semiconductor manufacturing apparatus and method for transferring wafer
A semiconductor manufacturing apparatus includes one or more process modules, a scheduler, and a transfer controller. A product wafer of a lot that is transferred from a load port to one of the one or more process modules is replenished such that a total number of wafers that are simultaneously processed in the one or more process modules becomes N. When an advance lot being processed and a post lot to be processed subsequent to the advance lot have a same processing condition, the scheduler creates the transfer plan to replenish with the product wafer of the post lot instead of a dummy wafer such that the transfer controller transfers the product wafer and the dummy wafer to the one or more process modules according to the created transfer plan.