H01L21/67282

SEMICONDUCTOR DEVICE MANUFACTURING METHOD, X-RAY DIFFRACTION DEVICE AND SEMICONDUCTOR PATTERN TRANSFER SYSTEM
20240231234 · 2024-07-11 · ·

There is provided a semiconductor device manufacturing method which includes: a step of radiating an X-ray to a semiconductor wafer on which two alignment marks are formed and then detecting an intensity of a diffracted X-ray of the X-ray coming from the semiconductor wafer, to thereby determine a direction of a predetermined crystal plane of the semiconductor device, viewed from a direction perpendicular to a surface of the semiconductor wafer; a step of calculating an angle ? created between the direction of the predetermined crystal plane and a straight line connecting these two alignment marks; a step of adjusting a position of the semiconductor wafer so that an angle created between a predetermined reference direction and the straight line is matched with the angle ?; and a step of transferring a pattern onto the semiconductor wafer with reference to the predetermined reference direction.

LASER PROCESSING APPARATUS
20190043743 · 2019-02-07 ·

A laser processing apparatus has a control unit including an inspection modified layer former detecting a provisional orientation flat of a bare wafer and applying a laser beam of a predetermined output power level to the bare wafer depending on the direction of the provisional orientation flat thereby to form a modified layer for detecting the crystal orientation closely to an outer edge of the bare wafer, and a crack detector detecting a crack extending from the modified layer toward a Y-axis and an exposed surface of the bare wafer, providing the modified layer extends along an X-axis in an image captured of the modified layer. If the crack detector detects no crack, the control unit determines the modified layer with no crack extending therefrom as extending parallel to the crystal orientation of the bare wafer.

INTEGRATED CIRCUIT SECURITY
20190035746 · 2019-01-31 ·

A semiconductor product includes a substrate having a self-assembly (SA) pattern. An initial SA pattern is created using a block copolymer (BCP) which has been annealed on the substrate. The initial SA pattern and/or an enlarged SA pattern derived from the initial SA pattern is incorporated into the semiconductor product. The SA pattern is an information carrying security mark having a set of features with corresponding locations within the information carrying security mark which uniquely identify the semiconductor product. In other embodiments of the invention a method and system for creating the semiconductor product are described.

INKJET PRINTING SYSTEM AND METHOD FOR PROCESSING SUBSTRATES

Inkjet printing system for processing substrates including a chuck for placement of a substrate and an inkjet printing head with at least one nozzle. Each chuck has chuck reference marks, each of which is associated with an associated camera. An electronic controller assembly is configured to take a set of images each instance a substrate having substrate reference marks has been placed on a chuck, with each image containing a chuck reference mark and a substrate reference mark. For each image, the position of the chuck relative to the camera and the position of the substrate relative to the camera is determined. Subsequently, the substrate position relative to the chuck is calculated and based thereon the firing of the at least one nozzle is timed and the movement of the printing motion assembly is controlled so that the liquid drops are accurately positioned on the substrate.

Process substrate with crystal orientation mark, method of detecting crystal orientation, and reading device of crystal orientation mark

To provide a crystal orientation mark which can be formed easily and inexpensively, and which enables to perform high precision alignment and allows information other than crystal orientation to be included, even for a small diameter process substrate. A crystal orientation mark is drawn on the surface of the process substrate. The crystal orientation mark includes a marking region for crystal orientation detection, and a marking region for information. The marking region for crystal orientation detection is provided at two locations in an outer edge portion of the process substrate to be used for the alignment of the process substrate. The marking region for information is provided on a straight-line region connecting the marking regions for crystal orientation detection at the two locations, and includes a pattern for demonstrating predetermined information relating to the process substrate.

Condensing point position detecting method
10183359 · 2019-01-22 · ·

There is provided a condensing point position detecting method of detecting a position in an optical axis direction of a condensing point of a laser beam condensed by a condenser of a laser processing apparatus. The condensing point position detecting method includes: an irradiation mark forming step of forming a plurality of irradiation marks in a substrate by irradiating the substrate held by a chuck table with the laser beam while moving the condenser in the optical axis direction with respect to the substrate; and a condensing point position detecting step of detecting an irradiation mark having a proper shape from the plurality of irradiation marks formed in the substrate, and detecting the position of the condensing point forming the proper irradiation mark as a position of an accurate condensing point.

METHOD FOR PRECISELY ALIGNING BACKSIDE PATTERN TO FRONTSIDE PATTERN OF A SEMICONDUCTOR WAFER

A method comprises the steps of providing a semiconductor device wafer; forming a first plurality of alignment marks on a first side of the semiconductor device wafer; forming a first pattern of a first conductivity type; forming a second plurality of alignment marks on a second side of the semiconductor device wafer; forming a bonded wafer by bonding a carrier wafer to the semiconductor device wafer; forming a third plurality of alignment marks on a free side of the carrier wafer; applying a grinding process; forming a plurality of device structure members; removing the carrier wafer; applying an implanting process and an annealing process; applying a metallization process and applying a singulation process.

LITHOGRAPHY ENGRAVING MACHINE FOR FORMING WAFER IDENTIFICATION MARKS AND ALIGNMENT MARKS

The present disclosure relates a method of forming substrate identification marks. In some embodiments, the method may be performed by forming a photosensitive material over a substrate. A first type of electromagnetic radiation is selectively provided to the photosensitive material to expose a plurality of substrate identification marks within the photosensitive material, and a second type of electromagnetic radiation is selectively provided to the photosensitive material to expose one or more alignment marks within the photosensitive material. Exposed portions of the photosensitive material are removed to form a patterned photosensitive material. The substrate is etched according to the patterned photosensitive material to form recesses within the substrate that are defined by the plurality of substrate identification marks and the one or more alignment marks.

WAFER MARKING METHOD, METHOD OF PRODUCING NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR SUBSTRATE

A wafer marking method uses a laser for performing a laser marking on a defect region of a nitride semiconductor substrate in which a nitride semiconductor layer contains at least a GaN layer formed by epitaxial growth on a single-crystal silicon substrate. The method includes that a surface of the GaN layer and a surface of the single-crystal silicon substrate are performed laser marking simultaneously by irradiating the defect region with a laser of a wavelength within ?10% of 365 nm, having a wavelength corresponding to a band gap energy of GaN.

APPARATUS WITH CIRCUIT-LOCATING MECHANISM
20240265990 · 2024-08-08 ·

An apparatus includes a substrate; circuit components disposed on the substrate; and a location identifier layer over the circuit, wherein the location identifier layer includes one or more section labels for representing physical locations of the circuit components within the apparatus.