H01L21/67288

PEELING APPARATUS
20170358468 · 2017-12-14 ·

A peeling apparatus peels a protective member off a wafer, the protective member including a resin and a film which is fixed to one surface of the wafer with the resin interposed therebetween. The film has a protrusive marginal side extending radially outwardly beyond an outer circumferential edge of the wafer. A holding unit holds another surface of the wafer with the protective member disposed therebelow. A gripping unit grips the protrusive marginal side of the protective member. A peeling mechanism peels the protective member off the wafer by relatively moving the gripping unit and the holding unit radially inwardly from the outer circumferential edge of the wafer toward the center of the wafer. A camera then captures an image of the wafer, and a decision unit determines whether residue of the resin remains on the wafer from the image captured by the camera.

APPARATUS AND METHOD FOR CONTROLLING CHUCKING FORCE

An apparatus includes a chuck having an upper surface configured to support a substrate; a fixing unit configured to generate chucking force to fix the substrate to the chuck in a first perpendicular direction and applying the chucking force to the substrate; and a controller configured to divide the chuck into a plurality of zones on a plane perpendicular to the first direction, based on reference overlay distribution corresponding to a degree of overlay deterioration when the substrate is fixed to the upper surface of the chuck, and individually control respective magnitudes of the chucking force applied to each of the plurality of zones. The controller is configured to reduce a magnitude of chucking force applied to a zone including a region having a high degree of overlay deterioration, among the plurality of zones, in the reference overlay distribution.

SEMICONDUCTOR INSPECTION APPARATUS, SEMICONDUCTOR INSPECTION SYSTEM INCLUDING THE SAME, AND SEMICONDUCTOR INSPECTION METHOD USING THE SAME

Disclosed are semiconductor inspection apparatuses, systems, and methods. The semiconductor inspection method comprises heating a top surface of a semiconductor package, capturing the top surface of the heated semiconductor package to obtain thermal image data, and analyzing the thermal image data. The analyzing the thermal image data includes analyzing first thermal image data about the top surface at a first region of the semiconductor package, and analyzing second thermal image data about the top surface at a second region of the semiconductor package. The analyzing the first thermal image data includes obtaining first region data about temperature distribution at the top surface of the first region, and using the first region data to obtain thickness data of a cover molding layer about thickness distribution of the molding layer on the chip in the first region.

METHOD FOR INSPECTING A CONTAINER AND INSPECTION SYSTEM
20230187244 · 2023-06-15 ·

The present disclosure relates to a method for inspecting a container body adapted and configured to hold substrates, comprising the steps of directing light from a light source onto a reflector element positioned within an interior space of the container body, such that the light is reflected to illuminate at least one interior surface of the container body, wherein the light is reflected by the reflector element in a diffuse manner and generating at least one image of the at least one interior surface by means of at least one camera, and evaluating the state of the container body on the basis of the at least one image.

SYSTEM AND METHOD FOR MONITORING CHEMICAL MECHANICAL POLISHING
20230182257 · 2023-06-15 ·

An apparatus for chemical mechanical polishing of a wafer includes a process chamber and a rotatable platen disposed inside the process chamber. A polishing pad is disposed on the platen and a wafer carrier is disposed on the platen. A slurry supply port is configured to supply slurry on the platen. A process controller is configured to control operation of the apparatus. A set of microphones is disposed inside the process chamber. The set of microphones is arranged to detect sound in the process chamber during operation of the apparatus and transmit an electrical signal corresponding to the detected sound. A signal processor is configured to receive the electrical signal from the set of microphones, process the electrical signal to enable detection of an event during operation of the apparatus, and in response to detecting the event, transmit a feedback signal to the process controller. The process controller is further configured to receive the feedback signal and initiate an action based on the received feedback signal.

SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD

There is provided a substrate processing apparatus comprising a liquid amount detecting part configured to detect a liquid amount of a liquid film formed on a substrate; and a coating state detecting part configured to detect a coating state of the substrate with the liquid film formed thereon.

Systems for uniform heat transfer including adaptive portions

Provided are adaptive heat transfer methods and systems for uniform heat transfer to and from various types of workpieces, such as workpieces employed during fabrication of semiconductor devices, displays, light emitting diodes, and photovoltaic panels. This adaptive approach allows for reducing heat transfer variations caused by deformations of workpieces. Deformation may vary in workpieces depending on types of workpieces, processing conditions, and other variables. Such deformations are hard to anticipate and may be random. Provided systems may change their configurations to account for the conformation of each new workpiece processed. Further, adjustments may be performed continuously of discretely during heat transfer. This flexibility can be employed to improve heat transfer uniformity, achieve uniform temperature profile, reduce deformation, and for various other purposes.

SUBSTRATE INSPECTION SYSTEM AND METHOD OF USE THEREOF
20230187238 · 2023-06-15 ·

A method of inspection and an inspection system for the film deposition process for substrates that includes glass and wafer are disclosed. The inspection system includes multiple camera modules positioned in a load lock unit of a process chamber, such as the camera modules that can capture images of the substrate in the load lock. The images are analyzed by a controller of the inspection system to determine the accuracy of robots in handling the substrate, calibration of the robots based on the analysis, and defects in the substrate caused during the handling and deposition process.

SUBSTRATE PROCESSING APPARATUS, METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, AND RECORDING MEDIUM

A technique that includes: a substrate holder provided with a substrate mounting table on which a substrate is mounted; a substrate transferrer configured to load or unload the substrate onto or from the substrate mounting table; a process container configured to accommodate the substrate holder holding the substrate; a film-forming gas supply system configured to supply a film-forming gas to the substrate in the process container; and a controller configured to be capable of controlling the substrate transferrer and the film-forming gas supply system to interrupt execution of a film forming process for supplying the film-forming gas to the substrate and perform a process for separating the substrate mounted on the substrate mounting table at least once until a film having a desired thickness is formed on the substrate after the film forming process is started.

DETECTION STRUCTURE FOR CHIP EDGE CRACKS AND DETECTION METHOD THEREOF
20230184718 · 2023-06-15 · ·

The present application discloses a detection structure for chip edge cracks and a detection method thereof. In one embodiment, the detection structure comprises a test ring located between a chip scribe line and a sealing ring, wherein the chip internally comprises two test pads for detecting continuity of the test ring, the sealing ring comprises a P-type doped ring located in a substrate and a shallow trench isolation area for isolating the sealing ring the test ring, the shallow trench isolation area is formed with N-type doped regions electrically connected to the two test pads respectively; the test ring comprises a multi-layer interconnection structure located on the substrate and the interconnection structure is electrically connected to the two test pads through the N-type doped regions. The present application can detect edge cracks caused by wafer manufacturing, die sawing, and chip packaging processes to reduce reliability risk.