A method and a system for illuminating a substrate, the system may include an acousto-optic device (AOD); and an etendue expanding optical module. The AOD may include a surface having an illuminated region; wherein the illuminated region is configured to receive a collimated input beam while being fed with a control signal that causes the illuminated region to output illuminated region output beams that are collimated and exhibit deflection angles that scan, during a scan period, a deflection angular range. The etendue expanding optical module is configured to convert the illuminated region output beams to collimated output beams that impinge on an output aperture; wherein a collimated output beam has a width that exceeds a width of an illuminated region output beam; and wherein the etendue expanding optical module comprises a Dammann grating that is configured to output diffraction patterns, each diffraction pattern comprises diffraction orders that cover a continuous angular range.

Collection device for collecting elements on at least one bevel of a circular plate, comprising: a base comprising a collection groove intended to receive a collection liquid, a plate-carrier able to rotate the plate about itself and such that an outer periphery of the plate penetrates into the collection groove, wherein the collection device comprises means for visualising the interior of the collection groove, enabling at least one image to be acquired of the contact region between the collection liquid and a face of the plate.

A method of preparing a self-aligned via on a semiconductor workpiece includes using an integrated sequence of processing steps executed on a common manufacturing platform hosting a plurality of processing modules including one or more film-forming modules, one or more etching modules, and one or more transfer modules. The integrated sequence of processing steps include receiving the workpiece into the common manufacturing platform, the workpiece having a pattern of metal features in a dielectric layer wherein exposed surfaces of the metal features and exposed surfaces of the dielectric layer together define an upper planar surface; selectively etching the metal features to form a recess pattern by recessing the exposed surfaces of the metal features beneath the exposed surfaces of the dielectric layer using one of the one or more etching modules; and depositing an etch stop layer over the recess pattern using one of the one or more film-forming modules.

A semiconductor manufacturing apparatus according to an embodiment includes: a stage to have a plurality of pins to hold a semiconductor substrate having a first surface on which a film to be etched is formed and a second surface positioned on an opposite side to the first surface; a nozzle to eject a liquid chemical toward the first surface of the semiconductor substrate from above the stage; and an optical measurer to radiate light toward the second surface of the semiconductor substrate from a side of the stage during ejection of the liquid chemical, and to measure a displacement amount of the semiconductor substrate based on a state of reception of light reflected on the second surface.

A semiconductor manufacturing equipment cleaning system has a multi-station cleaning and inspection system. Within semiconductor manufacturing equipment cleaning system, a tray cleaning station uses a first rotating brush passing over a first surface of a carrier and possibly semiconductor die, and a second rotating brush passing over a second surface of the carrier and semiconductor die opposite the first surface of the carrier and semiconductor die. Debris and contaminants dislodged from the first surface and second surface of the carrier by the first rotating brush and second rotating brush are removed under vacuum suction. A conveyor transports the carrier through the multi-station cleaning and inspection system. The first rotating brush and second rotating brush move in tandem across the first surface and second surface of the carrier. Air pressure is injected across the first rotating brush and second rotating brush to further remove debris and contaminants.

A conveyance abnormality prediction system includes an estimation unit that has a learned model having machine learned a relationship between a data set including sensor data outputted, at a time of substrate transport in the past, from each of a plurality of sensors provided on a substrate transport unit and a degree of conveyance abnormality at the time of the substrate transport, estimates a degree of conveyance abnormality at a time of new substrate transport by using, as an input, a data set including sensor data outputted from each of the plurality of sensors at the time of the new substrate transport, and outputs the estimated degree of conveyance abnormality.

A semiconductor processing system includes a processing chamber configured to perform a semiconductor manufacturing process on each of a plurality of wafers. The processing chamber includes at least one consumable component, and a substrate handling module located proximate the processing chamber and in communication with the processing chamber via a wafer access port. The wafer handling module includes a wafer handling robot configured to transfer each of the wafers between to the substrate handling module and the processing chamber through the wafer access port, and an optical diagnostic system including an optical sensor configured to detect an optical signal from the at least one consumable component. A controller is configured to cause the processing chamber to perform the semiconductor manufacturing process on each respective wafer and to cause the optical diagnostic system to detect the optical signal during a time when the processing chamber is not performing the semiconductor manufacturing process on the wafers.

A method for quantifying sensitivity of metrology to process variation including performing metrology, by a metrology tool, on at least one metrology target located at at least one site on a semiconductor wafer, thereby generating a metrology landscape, and calculating a sensitivity metric directly based on the metrology landscape, the sensitivity metric quantifying a sensitivity of the metrology landscape to process variation involved in manufacture of the semiconductor wafer.

An apparatus for detecting a crack of a semiconductor chip may include a crack sensor including a charging pattern disposed on a first surface of a target layer in which cracks are to be detected, a charge sinking pattern disposed on a second surface of the target layer, and a connecting pattern that electrically connects the charging pattern to the charge sinking pattern. The apparatus for detecting a crack may further include a charger for charging electric charges to the charging pattern, an image detector for obtaining an image of the charging pattern, and a determination unit that detects a discolored charging pattern from the image of the charging pattern and determines that a crack has occurred in a portion of the target layer in which the discolored charging pattern is located.

A diaphragm position of a valve may be detected and/or determined such that operation of the diaphragm may be monitored. A sensor included in the valve may generate sensor data that may be used to monitor the position of the diaphragm, which in turn may be used to determine a flow of a fluid through the valve. In this way, the sensor may be used to determine whether the diaphragm is properly functioning, may be used to identify and detect failures of the diaphragm, and/or may be used to quickly terminate operation of an associated deposition tool. This may reduce semiconductor substrate scrap, may reduce device failures on semiconductor substrates that are processed by the deposition tool, may increase semiconductor processing quality of the deposition tool, and/or may increase semiconductor processing yields of the deposition tool.