Apparatus to store singulated wafers for transport, including multiple wafer assemblies stacked in the interior of a container housing, the individual wafer assemblies including an expanded laser diced wafer singulated into dies, a first frame spaced outward from the wafer on a carrier structure, a second frame spaced outward from the wafer and inward from the first frame on the carrier structure, and a foam structure that supports the second frame and the carrier structure.

An on-wafer calibration device comprises on a substrate at least a first measuring port, at least a first switch element, at least two calibration standards, and a controller unit or a control interface for control of the first switch element. The first switch element is controlled in a manner that it selectively connects a wafer probe tip connectable to the first measuring port to the at least two calibration standards.

The various embodiments provide a semiconductor chip holder that holds semiconductor chips. The chip holder protects the semiconductor chips from possible damage during transport and/or storage. The chip holder is flexible and may be wound around a reel for convenient transport and storage. In one embodiment, the chip holder includes a support substrate with receptacles that receive semiconductor chips, a cover layer that seals the receptacles and holds the semiconductor chips within the receptacles, and plugs to securely couple the support substrate and the cover layer together.

Apparatus to store singulated wafers for transport, including multiple wafer assemblies stacked in the interior of a container housing, the individual wafer assemblies including an expanded laser diced wafer singulated into dies, a first frame spaced outward from the wafer on a carrier structure, a second frame spaced outward from the wafer and inward from the first frame on the carrier structure, and a foam structure that supports the second frame and the carrier structure.

In an embodiment, a system includes: a warehousing apparatus configured to interface with a semiconductor die processing tool configured to process a semiconductor die singulated from a wafer, wherein the semiconductor die processing tool comprise an in-port and an out-port, wherein the warehousing apparatus is configured to: move a first die vessel that contains the semiconductor die to the in-port from a first die vessel container, wherein the first die vessel container is configured to house the first die vessel; move the first die vessel from the in-port to a buffer region; and move a second die vessel from the buffer region to the out-port.

An apparatus having a first portion including first front wall, first rear wall, and bottom wall integrally coupled to the first front wall and the first rear wall, and pivotal pin structures integrally coupled to and extending from the first rear wall. The apparatus includes a second portion having second front wall, second rear wall, and top wall integrally coupled to the second front wall and the second rear wall, and pin holders integrally coupled to and extending from the second rear wall and at an offset angle with reference to the top wall. The pivotal pin structure includes a base support connected to the first rear wall and a shaft connected to the base support, and the pin holder defines an opening sized and shaped to accept the shaft. The first and second portions are sized and shaped to be pivotally movable between an open and closed configurations.

An apparatus having a first portion including a first front wall, a first rear wall, and a bottom wall integrally coupled to the first front wall and the first rear wall, and pivotal pin structures integrally coupled to and extending from the first rear wall. The apparatus includes a second portion having a second front wall, a second rear wall, and a top wall integrally coupled to the second front wall and the second rear wall, and pin holders integrally coupled to and extending from the second rear wall and at an offset angle with reference to the top wall. The pivotal pin structure includes a base support connected to the first rear wall and a shaft connected to the base support, and the pin holder defines an opening sized and shaped to accept the shaft. The first and second portions are sized and shaped to be pivotally movable between open and closed configurations.

A frame cassette used for semiconductor processing is provided. The frame cassette includes: a housing; and a plurality of cover cases disposed in the housing. Each of the plurality of cover cases is capable of accommodating a frame and includes: a bottom section; a top section parallel to the bottom section; and at least one sidewall extending, in a vertical direction, between and connecting the bottom section and the top section to form an enclosed space.

A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.

The present invention relates to a chip counter, which transmits an X-ray beam through a tape reel around which a tape having a plurality of semiconductor chips mounted in a row therein is wound, acquires an image scattered or diffracted by the semiconductor chips, and processes the acquired image, so as to count the number of the semiconductor chips, wherein: the X-ray beam transmitted through the tape reel (1) is sensed by a fluorescent intensifying screen (60); a fluorescent light emitted from the fluorescent intensifying screen (60) according to the sensing of the X-ray beam is captured by a camera (70), so that the number of the semiconductor chips is counted from an image in which the semiconductor chips are displayed by a dotted image; and the camera (70) is protected by an X-ray beam shielding member (100: 110; 120; and 130).