H01L21/67396

APPARATUS FOR PROCESSING SUBSTRATE

A process apparatus includes an electrostatic chuck disposed at a substrate holder. The electrostatic chuck includes a dielectric and an electrode. The electrode is disposed in an interior of the dielectric. The apparatus further includes a circuit electrically connected to the electrode of the electrostatic chuck and a first earth wire electrically connected to the circuit. The first earth wire is shielded by a metal with an electrically insulating cover interposed.

Package assembly for thin wafer shipping and method of use

A package assembly for thin wafer shipping using a wafer container and a method of use are disclosed. The package assembly includes a shipping container and a wafer container having a bottom surface and a plurality of straps attached thereto placed within the shipping container. The package assembly further includes upper and lower force distribution plates provided within the shipping container positioned respectively on a top side and bottom side thereof.

Semiconductor die carrier structure

An apparatus having a first portion including a first front wall, a first rear wall, and a bottom wall integrally coupled to the first front wall and the first rear wall, and pivotal pin structures integrally coupled to and extending from the first rear wall. The apparatus includes a second portion having a second front wall, a second rear wall, and a top wall integrally coupled to the second front wall and the second rear wall, and pin holders integrally coupled to and extending from the second rear wall and at an offset angle with reference to the top wall. The pivotal pin structure includes a base support connected to the first rear wall and a shaft connected to the base support, and the pin holder defines an opening sized and shaped to accept the shaft. The first and second portions are sized and shaped to be pivotally movable between open and closed configurations.

Array substrate, fabricating method thereof, and display device

An array substrate, a fabricating method thereof, and a related display device are provided. The method for forming an array substrate can comprises: forming a plurality of signal lines over a base substrate; forming a conductive line over the base substrate, the conductive line connecting at least two of the plurality of signal lines; forming an insulating layer over the base substrate, the plurality of signal lines, and the conductive line; forming a via hole through the insulating layer at a position over the conductive line and between the at least two of the plurality of signal lines; and removing a portion of the conductive line through the via hole to disconnect the conductive line.

TRAY MODULE, TRAY ASSEMBLY INCLUDING THE SAME, AND METHOD FOR MANUFACTURING DISPLAY DEVICE USING THE SAME
20200043768 · 2020-02-06 ·

A tray module capable of discharging static electricity to safely transfer display device members (e.g., components) includes: a tray configured to accommodate at least two members of a display device, at least two conductive protection films alternatingly stacked with the members of the display device, and a conductive pattern on the tray to provide a discharge path with the conductive protection films to ground.

PACKAGE ASSEMBLY FOR THIN WAFER SHIPPING AND METHOD OF USE
20200027766 · 2020-01-23 ·

A package assembly for thin wafer shipping using a wafer container and a method of use are disclosed. The package assembly includes a shipping container and a wafer container having a bottom surface and a plurality of straps attached thereto placed within the shipping container. The package assembly further includes upper and lower force distribution plates provided within the shipping container positioned respectively on a top side and bottom side thereof.

SEMICONDUCTOR DIE CARRIER STRUCTURE

An apparatus having a first portion including first front wall, first rear wall, and bottom wall integrally coupled to the first front wall and the first rear wall, and pivotal pin structures integrally coupled to and extending from the first rear wall. The apparatus includes a second portion having second front wall, second rear wall, and top wall integrally coupled to the second front wall and the second rear wall, and pin holders integrally coupled to and extending from the second rear wall and at an offset angle with reference to the top wall. The pivotal pin structure includes a base support connected to the first rear wall and a shaft connected to the base support, and the pin holder defines an opening sized and shaped to accept the shaft. The first and second portions are sized and shaped to be pivotally movable between an open and closed configurations.

SEMICONDUCTOR DIE CARRIER STRUCTURE

An apparatus having a first portion including a first front wall, a first rear wall, and a bottom wall integrally coupled to the first front wall and the first rear wall, and pivotal pin structures integrally coupled to and extending from the first rear wall. The apparatus includes a second portion having a second front wall, a second rear wall, and a top wall integrally coupled to the second front wall and the second rear wall, and pin holders integrally coupled to and extending from the second rear wall and at an offset angle with reference to the top wall. The pivotal pin structure includes a base support connected to the first rear wall and a shaft connected to the base support, and the pin holder defines an opening sized and shaped to accept the shaft. The first and second portions are sized and shaped to be pivotally movable between open and closed configurations.

SEMICONDUCTOR PROCESSING APPARATUS AND METHOD UTILIZING ELECTROSTATIC DISCHARGE (ESD) PREVENTION LAYER

Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.

Semiconductor wafer processing system and method

A semiconductor wafer processing system includes a stocker having an interior surface, a wafer carrier disposed within the stocker, a wafer shelf disposed within the wafer carrier for storing a semiconductor wafer, and a discharge circuit including a first conductor electrically coupled to the wafer shelf and a first current controller electrically coupled to the first conductor and to the interior surface of the stocker.