The present invention relates to a film touch sensor in which a separation layer is formed on a carrier substrate prior to the formation procedures of the touch sensor and an insulation layer is formed to be used as a planarization layer, an adhesive layer or a base layer, and a method of preparing the film touch sensor.

A solid-state imaging device includes: a pixel region in which a plurality of pixels composed of a photoelectric conversion section and a pixel transistor is arranged; an on-chip color filter; an on-chip microlens; and a multilayer interconnection layer in which a plurality of layers of interconnections is formed through an interlayer insulating film. The solid-state imaging device further includes a light-shielding film formed through an insulating layer in a pixel boundary of a light receiving surface in which the photoelectric conversion section is arranged.

A self-supporting substrate includes a first nitride layer grown by hydride vapor deposition method or ammonothermal method and comprising a nitride of one or more element selected from the group consisting of gallium, aluminum and indium; and a second nitride layer grown by a sodium flux method on the first nitride layer and comprising a nitride of one or more element selected from the group consisting of gallium, aluminum and indium. The first nitride layer includes a plurality of single crystal grains arranged therein and being extended between a pair of main faces of the first nitride layer. The second nitride layer includes a plurality of single crystal grains arranged therein and being extended between a pair of main faces of the second nitride layer. The first nitride layer has a thickness larger than a thickness of the second nitride layer.

A method of fabricating an electronic device can include forming a plurality of vertical channels having sidewalls over a substrate, and forming gate dielectric regions over portions of the vertical channels and planar regions adjoining the vertical channels. Gate electrode regions are then formed over portions of the gate dielectric regions. The gate electrode material and the vertical channel region are doped and sized to enable full depletion of charges during operation. Source and body tie regions are formed on the vertical sidewalls by doping with a p-type or n-type dopant. Dielectric regions over the gate electrode regions are formed to electrically isolate the gate electrode regions from the source regions. A metallic layer is formed over the first side of the substrate having the vertical channels. Stress is then induced within the substrate by annealing and/or cooling to separate a semiconductor region of the substrate and the metallic layer from the remaining portion of the substrate. Drain electrode contacts are formed over the semiconductor region while gate electrode and source electrode contacts are formed by etching portions of a metallic layer formed over the first side of the substrate.

The present invention provides processes for manufacturing a plurality of discrete integrated circuits (ICs) on a carrier, the process comprising the steps of: providing a carrier for a flexible substrate; depositing a flexible substrate of uniform thickness on said carrier; removing at least a portion of the thickness of the flexible substrate from at least a portion of the IC connecting areas to form channels in the flexible substrate and a plurality of IC substrate units spaced apart from one another on the carrier by said channels; forming an integrated circuit on at least one of the IC substrate units.

A semiconductor memory device includes a gate stack structure including alternately stacked interlayer insulating layers and conductive layers, a core pillar penetrating the gate stack structure, a channel layer disposed between the core pillar and the gate stack structure, a memory layer disposed between the channel layer and the gate stack structure, and a doped semiconductor part in contact with the gate stack structure. The doped semiconductor part includes a first region surrounding the core pillar up to an interface in contact with the gate stack structure and a second region extending between the memory layer and the core pillar from the first region.

A method of liquid-mediated pattern transfer includes providing a substrate comprising (a) a semiconductor film adhered to the substrate and (b) a first patterned layer on the semiconductor film. The substrate is submerged in a delamination liquid, whereby the semiconductor film is delaminated from the substrate while the first patterned layer remains on the semiconductor film. A patterned semiconductor membrane ready for transfer is thus obtained. The patterned semiconductor membrane is transferred to a target substrate in a transfer liquid, and then the transfer liquid is removed (e.g., evaporated). The patterned semiconductor membrane adheres to the target substrate as the transfer liquid is removed.

Electronic devices are formed on donor substrates and transferred to carrier substrates by forming bonding regions on the electronic devices and bonding the bonding regions to a carrier substrate. The transfer process may include forming anchors and removing sacrificial regions.

A method for manufacturing a semiconductor device includes the steps of forming a fixing layer, coupling a third substrate different from the first substrate and the second substrate to the fixing layer, separating the semiconductor thin film layer from the first substrate by moving the third substrate away from the base material substrate with the third substrate coupled to the coupling region, and bonding the semiconductor thin film layer to the second substrate after separation from the base material substrate, wherein the forming the fixing layer forms the fixing layer having a thickness such lhat a crack is generated between the fixing layer formed on the first substrate and the fixing layer formed on a side surface of the semiconductor thin film layer by a force for moving the third substrate.

A peeling method at low cost with high mass productivity is provided. An oxide layer is formed over a formation substrate, a first layer is formed over the oxide layer using a photosensitive material, an opening is formed in a portion of the first layer that overlaps with the oxide layer by a photolithography method and the first layer is heated to form a resin layer having an opening, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, a conductive layer is formed to overlap with the opening of the resin layer and the oxide layer, the oxide layer is irradiated with light using a laser, and the transistor and the formation substrate are separated from each other.