H01L21/7806

3D memory devices and structures with control circuits

A semiconductor device, the device including: a first level including control circuits, where the control circuits include a plurality of first transistors and a plurality of metal layers; and a memory level disposed on top of the first level, where the memory level includes an array of memory cells, where each of the memory cells includes at least one second transistor, where the control circuits control access to the array of memory cells, where the first level is bonded to the memory level, where the bonded includes oxide to oxide bonding regions and a plurality of metal to metal bonding regions, and where at least a portion of the array of memory cells is disposed directly above at least one of the plurality of metal to metal bonding regions.

PROCESSES AND APPLICATIONS FOR CATALYST INFLUENCED CHEMICAL ETCHING

A system for assembling fields from a source substrate onto a second substrate. The source substrate includes fields. The system further includes a transfer chuck that is used to pick at least four of the fields from the source substrate in parallel to be transferred to the second substrate, where the relative positions of the at least four of the fields is predetermined.

TWO-DIMENSIONAL SEMICONDUCTOR TRANSISTOR HAVING REDUCED HYSTERESIS AND MANUFACTURING METHOD THEREFOR

A two-dimensional semiconductor transistor includes a gate electrode, a gate insulating layer disposed on the gate electrode, an organic dopant layer disposed on the gate insulating layer and comprising an organic material including electrons, a two-dimensional semiconductor layer disposed on the organic dopant layer, a source electrode disposed on the two-dimensional semiconductor layer, and a drain electrode disposed on the two-dimensional semiconductor layer and spaced apart from the source electrode. A hysteresis of the two-dimensional semiconductor transistor is reduced due to the two-dimensional semiconductor transistor including the organic dopant layer.

3D MEMORY DEVICES AND STRUCTURES WITH CONTROL CIRCUITS
20230020251 · 2023-01-19 · ·

A semiconductor device, the device including: a first level including control circuits, where the control circuits include a plurality of first transistors and a plurality of metal layers; a memory level disposed on top of the first level, where the memory level includes an array of memory cells, where each of the memory cells include at least one second transistor, where the control circuits control the array of memory cells, where the first level is bonded to the memory level, where the bonded includes oxide to oxide bonding regions and a plurality of metal to metal bonding regions, and where at least one of the memory cells is disposed directly above at least one of the plurality of metal to metal bonding regions.

METHOD FOR THINNING WAFER
20230009693 · 2023-01-12 ·

A method for thinning a wafer is provided which is related to the field of semiconductor technologies, to resolve problems of a low yield, a complex process, and high preparation costs of a SiC power device. The wafer which may alternatively be understood as a composite substrate, includes a first silicon carbide layer, a dielectric layer, and a second silicon carbide layer that are disposed in a stacked manner. The wafer has a first side and a second side that are opposite to each other, and a side that is of the second silicon carbide layer and that is away from the first silicon carbide layer is the first side of the wafer.

BONDED SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING BONDED SEMICONDUCTOR DEVICE
20230215976 · 2023-07-06 · ·

A bonded semiconductor device including an epitaxial layer, and a support substrate made of a material different from that of the epitaxial layer and bonded to the epitaxial layer. Any one of the epitaxial layer and the support substrate has a bonding surface with a radial pattern including recesses or protrusions radially spreading from a certain point on the bonding surface as a center.

BONDED SEMICONDUCTOR LIGHT-RECEIVING DEVICE AND METHOD FOR MANUFACTURING BONDED SEMICONDUCTOR LIGHT-RECEIVING DEVICE
20230215817 · 2023-07-06 · ·

A bonded semiconductor light-receiving device including an epitaxial layer to serve as a device-functional layer, and a support substrate made of a material different from that of the device-functional layer and bonded to the epitaxial layer via a bonding material layer. The device-functional layer has a bonding surface with an uneven pattern formed thereon.

Thin-film transfer method

A method includes transferring a layer onto a flexible substrate, the layer being located in a stack on the front face of the substrate. The substrate includes at least one supplementary stack interposed between the stack and the bulk layer of the substrate. This supplementary stack includes at least two layers with thicknesses decreasing in the direction of the front face. The method makes provision, after bonding the flexible substrate on the front face, for successively and gradually removing the various layers of the substrate. Such gradualness makes it possible to transfer a thin layer of silicon, with a thickness of less than 50 nm, onto a flexible substrate.

Method and apparatus for producing at least one modification in a solid body

A method and apparatus are provided. In an example, a volume portion of the solid body is exposed to light waves of different wavelengths, wherein the light waves are partly reflected at surfaces of the solid body. Light parameters of the reflected light waves are at least partly acquired using a sensor device. Distance information and/or intensity information are/is ascertained from at least a portion of the acquired light parameters. A thickness and/or a transmittance of the solid body in the volume portion are/is determined based upon the distance information and/or the intensity information. Laser radiation is introduced into the volume portion to produce a modification in the interior of the solid body, wherein at least one laser parameter of the laser radiation is set at least depending on the thickness and/or the transmittance such that the modification is at a predefined distance from a surface of the solid body.

LAYERED BODY AND MANUFACTURING METHOD FOR LAYERED BODY
20220415714 · 2022-12-29 · ·

Included are: an underlying substrate including a first surface; a semiconductor element layer dividable into a plurality of element portions, the semiconductor element layer being located on the first surface of the underlying substrate; and a support substrate including a second surface on which the semiconductor element layer is located, the second surface facing the first surface, the semiconductor element layer being located on the second surface. The support substrate and the semiconductor element layer include a weak portion used to divide the semiconductor element layer into the plurality of element portions.