Provided is a method of manufacturing a nanorod. The method comprising comprises the steps of: providing a growth substrate and a support substrate; epitaxially growing a nanomaterial layer onto one surface of the growth substrate; forming a sacrificial layer on one surface of the support substrate; bonding the nanomaterial layer with the sacrificial layer; separating the growth substrate from the nanomaterial layer; flattening the nanomaterial layer; forming a nanorod by etching the nanomaterial layer; and separating the nanorod by removing the sacrificial layer.

A control unit performs first processing of irradiating an object with laser light while relatively moving a first converging point and a second converging point along a first line, in a state where a distance between the first converging point and a second converging point is set as a first distance, and performs second processing of irradiating the object with the laser light while relatively moving the first converging point and the second converging point along a second line, in a state where the distance between the first converging point and the second converging point is set to a second distance smaller than the first distance.

A device for collecting semiconductor light emitting diodes according to an embodiment of the present disclosure includes an electromagnet portion disposed in a fluid chamber into which semiconductor light emitting diodes including a magnetic material are put to form a magnetic field when power is applied, a power supply portion connected to the electromagnet portion and applying power to the electromagnet portion, and a driving portion moving the electromagnet portion in a width direction, in a longitudinal direction, and in a height direction of the fluid chamber, in which the electromagnet portion guides the semiconductor light emitting devices to a surface on which a magnetic field is formed when power is applied.

A stamp for micro-transfer printing includes a support having a support surface and posts disposed on the support surface. Each post has a distal end extending away from the support. The post has a post surface on the distal end. The post surface is a structured surface comprising spatially separated ridges that extend in a ridge direction entirely across the post surface and can be operable to form multiple delamination fronts when a first side of a micro-device is in contact with the post surface, a second side of the micro-device is in contact with a target surface of a target substrate, and the support is moved in a horizontal direction parallel to the target substrate surface. The post surface or ridges can be rectangular or non-rectangular with opposing edges having different lengths.

A method of preparing a device coupon for a micro-transfer printing process from a multi-layered stack located on a device wafer substrate. The multi-layered stack comprises a plurality of semiconductor layers. The method comprises steps of: (a) etching the multi-layered stack to form a multi-layered device coupon, including an optical component; and (b) etching a semiconductor layer of the multi-layered device coupon to form one or more tethers, said tethers securing the multi-layered device coupon to one or more supports.

The present disclosure provides a method for forming a three-dimensional (3D) memory device. The method includes forming a dielectric stack on a substrate, and forming a first opening penetrating through the dielectric stack and extending into the substrate from a first side of the dielectric stack. The method also includes forming a first layer and a second layer inside the first opening from the first side of the dielectric stack, wherein the first layer covers a sidewall and a bottom of the first opening. The method further includes removing a portion of the first layer located at the bottom of the first opening from a second side of the dielectric stack to expose a portion of the second layer. The method further includes forming a second semiconductor layer from the second side of the dielectric stack to contact the exposed portion of the second layer.

Methods of ion implantation combined with annealing using a pulsed laser or a furnace for cutting substrate in forming semiconductor devices and semiconductor devices including the same are disclosed. In an embodiment, a method includes forming a transistor structure of a device on a first semiconductor substrate; forming a front-side interconnect structure over a front side of the transistor structure; bonding a carrier substrate to the front-side interconnect structure; implanting ions into the first semiconductor substrate to form an implantation region of the first semiconductor substrate; and removing the first semiconductor substrate. Removing the first semiconductor substrate includes applying an annealing process to separate the implantation region from a remainder region of the first semiconductor substrate. The method also includes forming a back-side interconnect structure over a back side of the transistor structure.

A semiconductor device is provided, which includes a multi-layered substrate having an interposed polymeric film and a device layer arranged over the multi-layered substrate.

The invention relates to a process for manufacturing a composite structure comprising a thin layer made of a first single-crystal material positioned on a support substrate. The process comprises: a step a) of providing a donor substrate (10) composed of the first single-crystal material having a front face (10a) and a back face (10b), a step b) of providing a support substrate (20) having a front face (20a), a back face (20b), an edge (20c) and a first alignment pattern (21) on one of said faces or on the edge, a step c) of heat treatment applied at least to the donor substrate (10), under a controlled atmosphere and at a temperature capable of bringing about a surface reorganization on at least one of the faces (10a, 10b) of said substrate (10), the surface reorganization giving rise to the formation of first steps (13) of nanometric amplitude, which are parallel to a first main axis (P1), a step d) of assembling the donor substrate (10) and the support substrate (20) comprising, before the substrates (10, 20) are brought into contact, an optical alignment, to better than ±0.1°, between a locating mark (12) indicating the first main axis (P1) on the donor substrate (10) and at least one alignment pattern (21, 22) of the support substrate (20), a step e) of transferring a thin layer (100) from the donor substrate (10) onto the support substrate (20).

A method for manufacturing a semiconductor element includes providing, on a surface of a substrate 11, a mask 12 which has an opening 12a and in which a peripheral upper surface region of the opening is processed to have a predetermined structure, and epitaxially growing a semiconductor from the surface of the substrate exposed from the opening to the top of the peripheral upper surface region to fabricate a semiconductor element having a semiconductor layer 13 with the predetermined structure transferred thereon. In one example, the predetermined structure is due to a shape having a difference in level. In another example, the predetermined structure is due to a selectively arranged element, and the transferred element moves into the semiconductor layer.