A semiconductor device includes: a semiconductor chip; a case having a frame portion that has an inner wall portion surrounding an housing area in which the semiconductor chip is disposed; a buffer member provided on at last part of the inner wall portion of the case on a side of the housing area; a low expansion member provided on said at least part of the inner wall portion with the buffer member interposed therebetween on the side of the housing area; and a sealing member that seals the housing area, wherein the buffer member has a smaller elastic modulus than the case and the sealing member, and wherein the low expansion member has a smaller linear expansion coefficient than the case and the sealing member.

A preparation method for a spherical silica powder filler, comprises the following steps: S1, providing spherical polysiloxane comprising T units by means of a hydrolysis condensation reaction of R.sub.1SiX.sub.3, wherein R.sub.1 is hydrogen atom or an independently selectable organic group having 1 to 18 carbon atoms, X is a hydrolyzable group, and the T unit is R.sub.1SiO.sub.3—; and S2, calcining the spherical polysiloxane under the condition of a dry oxidizing gas atmosphere at a calcining temperature between 850° C. and 1200° C., so as to obtain a spherical silica powder filler having a low hydroxyl content. The spherical silica powder filler is composed of at least one selected from Q.sub.1 unit, Q.sub.2 unit, Q.sub.3 unit and Q.sub.4 unit, wherein Q.sub.1 unit is Si(OH).sub.3O—, Q.sub.2 unit is Si(OH).sub.2O.sub.2—,Q.sub.3 unit is SiOHO.sub.3—, Q.sub.4 unit is SiO.sub.4—, and the content of Q.sub.4 unit is greater than or equal to 95%.

An encapsulating material for compression molding includes an epoxy resin, a curing agent, and an inorganic filler. In an image obtained by observing, with an ultrasonic flaw detector, a compression-molded body formed by compression-molding the encapsulating material for compression molding on a substrate with a silicon chip interposed, the area of the portion other than dark spots of the region corresponding to the compression-molded body on the chip is 86% or more of the area of the entire region corresponding to the compression-molded body on the chip.

An amine-based curing agent including a compound represented by Chemical Formula 1, and a composition including the curing agent, and a semiconductor package, and an electronic device prepared with the composition.

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The definition of Chemical Formula 1 is as described in the detailed description.

A method includes forming a metal seed layer on a dielectric layer, and forming a patterned mask over the metal seed layer. An opening in the patterned mask is over a first portion of the dielectric layer, and the patterned mask overlaps a second portion of the dielectric layer. The method further includes plating a metal region in the opening, removing the patterned mask to expose portions of the metal seed layer, etching the exposed portions of the metal seed layer, performing a plasma treatment on a surface of the second portion of the dielectric layer, and performing an etching process on the surface of the second portion of the dielectric layer.

Optical packages and methods of fabrication are described. In an embodiment, a controller chip is embedded along with optical components, including a photodetector (PD) and one or more emitters, in a single package.

A tableted epoxy resin composition for encapsulation of semiconductor devices and a semiconductor device encapsulated using the tableted epoxy resin composition, the tableted epoxy resin composition satisfying the following conditions (i) a proportion of tablets of the tableted epoxy resin composition having a diameter of greater than or equal to 0.1 mm and less than 2.8 mm and a height of greater than or equal to 0.1 mm and less than 2.8 mm is about 97 wt % or more, as measured by sieve analysis using ASTM standard sieves; (ii) the tablets have a packed density of greater than about 1.7 g/mL; and (iii) a ratio of packed density to cured density of the tablets is about 0.6 to about 0.87.

A semiconductor package includes a substrate having a first surface and a second surface opposing the first surface; a plurality of first pads disposed on the first surface of the substrate and a plurality of second pads disposed on the second surface of the substrate and electrically connected to the plurality of first pads; a semiconductor chip disposed on the first surface of the substrate and connected to the plurality of first pads; a dummy chip having a side surface facing one side surface of the semiconductor chip, disposed on the first surface of the substrate spaced apart from the semiconductor chip in a direction parallel to the first surface of the substrate, the dummy chip having an upper surface positioned lower than an upper surface of the semiconductor chip in a direction perpendicular to the first surface of the substrate; an underfill disposed between the semiconductor chip and the first surface of the substrate, and having an extension portion extended along the facing side surfaces of the semiconductor chip and the dummy chip in the direction perpendicular to the first surface of the substrate, an upper end of the extension portion being disposed to be lower than the upper surface of the semiconductor chip; and a sealing material disposed on the first surface of the substrate, and sealing the semiconductor chip and the dummy chip.

A microelectronic device has bump bonds and an inductor on a die. The microelectronic device includes first lateral conductors extending along a terminal surface of the die, wherein at least some of the first lateral conductors contact at least some of terminals of the die. The microelectronic device also includes conductive columns on the first lateral conductors, extending perpendicularly from the terminal surface, and second lateral conductors on the conductive columns, opposite from the first lateral conductors, extending laterally in a plane parallel to the terminal surface. A first set of the first lateral conductors, the conductive columns, and the second lateral conductors provide the bump bonds of the microelectronic device. A second set of the first lateral conductors, the conductive columns, and the second lateral conductors are electrically coupled in series to form the inductor. Methods of forming the microelectronic device are also disclosed.

A semiconductor package includes a first semiconductor chip on a lower structure. A first underfill is between the first semiconductor chip and the lower structure. The first underfill includes a first portion adjacent to a center region of the first semiconductor chip, and a second portion adjacent to an edge region of the first semiconductor chip. The second portion has a higher degree of cure than the first portion. A plurality of inner connection terminals is between the first semiconductor chip and the lower structure. The plurality of inner connection terminals extends in the first underfill.