Patent classifications
H01L23/3135
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
In one example, a semiconductor device comprises a substrate having a top surface and a bottom surface, an electronic device on the bottom surface of the substrate, a leadframe on the bottom surface of the substrate, the leadframe comprising a paddle, wherein the paddle is coupled to the electronic device, and a lead electrically coupled to the electronic device. The semiconductor device further comprises a first protective material contacting the bottom surface of the substrate and a side surface of the electronic device.
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING A SEMICONDUCTOR STRUCTURE
A semiconductor structure includes a first die having a first surface and a second surface opposite to the first surface, a conductive bump disposed at the first surface, and an RDL under the conductive bump. The RDL includes an interconnect structure and a dielectric layer, and the interconnect structure is electrically connected to the first die through the conductive bump. The semiconductor structure further includes a molding over the RDL and surrounding the first die and the conductive bump, an adhesive over the molding and the second surface, and a support element over the adhesive. A method includes providing a first die having a first surface and a second surface, a redistribution layer over the first surface, and a molding surrounding the first die; removing a portion of the molding to expose the second surface; and attaching a support element over the molding and the second surface.
SEMICONDUCTOR PACKAGE
A semiconductor package is disclosed. The semiconductor package may include a first redistribution substrate including a first insulating layer and a first redistribution pattern, a lower semiconductor chip mounted on the first redistribution substrate, a conductive structure disposed on the first redistribution substrate and horizontally spaced apart from the lower semiconductor chip, a first mold layer interposed between the first redistribution substrate and the second redistribution substrate to cover the lower semiconductor chip and the conductive structure, a second redistribution substrate on the first redistribution substrate, the second redistribution substrate including a second insulating layer and a second redistribution pattern, a first heat-dissipation pattern interposed between the lower semiconductor chip and the second insulating layer, and a heat-dissipation pad on the conductive structure. A top surface of the first heat-dissipation pattern may be located at a level higher than a top surface of the conductive structure.
OMNI DIRECTIONAL INTERCONNECT WITH MAGNETIC FILLERS IN MOLD MATRIX
Various embodiments disclosed relate to methods of making omni-directional semiconductor interconnect bridges. The present disclosure includes semiconductor assemblies including a mold layer having mold material, a first filler material dispersed in the mold material, and a second filler material dispersed in the mold material, wherein the second filler material is heterogeneously dispersed.
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE
A semiconductor device includes a semiconductor element, a sealing member, and a rewiring layer. The rewiring layer includes an insulating layer covering a front surface of the semiconductor element and a part of the sealing member, an electrode connected to the semiconductor element, and an externally-exposed layer being conductive and covering a portion of the electrode exposed from the insulating layer.
PACKAGE STRUCTURE WITH BRIDGE DIE AND METHOD OF FORMING THE SAME
A package structure and method of forming the same are provided. The package structure includes a first die and a second die disposed side by side, a first encapsulant laterally encapsulating the first and second dies, a bridge die disposed over and connected to the first and second dies, and a second encapsulant. The bridge die includes a semiconductor substrate, a conductive via and an encapsulant layer. The semiconductor substrate has a through substrate via embedded therein. The conductive via is disposed over a back side of the semiconductor substrate and electrically connected to the through substrate via. The encapsulant layer is disposed over the back side of the semiconductor substrate and laterally encapsulates the conductive via. The second encapsulant is disposed over the first encapsulant and laterally encapsulates the bridge die.
SPLIT DIE INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING DIE-TO-DIE (D2D) CONNECTIONS IN DIE-SUBSTRATE STANDOFF CAVITY, AND RELATED FABRICATION METHODS
Split die IC packages employing a D2D interconnect structure in a die-substrate standoff cavity (i.e., cavity) to provide D2D connections, and related fabrication methods. To facilitate D2D communications between multiple dies in the split die IC package, the package substrate also includes a D2D interconnect structure (e.g., interconnect bridge) that contains D2D interconnects (e.g., metal interconnects) coupled to the multiple dies to provide D2D signal routing between the multiple dies. The D2D interconnect structure is disposed in a cavity that is formed in a die standoff area between the dies and the package substrate as a result of the die interconnects being disposed between the dies and the package substrate standing off the dies from the package substrate. The D2D interconnect structure can be provided in the cavity in the IC package outside of the package substrate to reserve more area in the package substrate for other interconnections.
Semiconductor package and PoP type package
A semiconductor package includes: a first package substrate; a first semiconductor device mounted on the first package substrate; a second package substrate arranged on an upper part of the first semiconductor device; and a heat-dissipating material layer arranged between the first semiconductor device and the second package substrate and having a thermal conductivity of approximately 0.5 W/m.Math.K to approximately 20 W/m.Math.K, wherein the heat-dissipating material layer is in direct contact with an upper surface of the first semiconductor device and a conductor of the second package substrate.
Package structure and manufacturing method thereof
A package structure includes a first semiconductor die, a second semiconductor die, a redistribution circuit structure, and a semiconductor device. The redistribution circuit structure has a first surface and a second surface opposite to the first surface, where the first surface is in contact with the first semiconductor die and the second semiconductor die, and the redistribution circuit structure is disposed on and electrically connected to the first semiconductor die and the second semiconductor die. The redistribution circuit structure includes a recess extending from the second surface toward the first surface. The semiconductor device is located in the recess and electrically connected to the first semiconductor die and the second semiconductor die through the redistribution circuit structure.
SEMICONDUCTOR DEVICE WITH RF INTERPOSER AND METHOD THEREFOR
A method of forming a self-aligned waveguide is provided. The method includes providing a radio frequency (RF) interposer. The RF interposer includes a non-conductive substrate, a radiating element formed on the non-conductive substrate, and a cavity formed in the non-conductive substrate. A packaged semiconductor die is affixed in the cavity of the RF interposer. A conductive material is dispensed to form a conductive path between a conductive connector of the packaged semiconductor die and the radiating element.