A semiconductor package includes; a package substrate, an interposer disposed on the package substrate, semiconductor chips mounted on the interposer, a molding member on the interposer and surrounding the semiconductor chips, a first sealing member on the molding member, and a heat dissipation member on the package substrate and covering the interposer, the semiconductor chips, and the first sealing member, wherein the heat dissipation member includes a lower structure contacting an upper surface of the package substrate, and an upper structure on the lower structure, extending over the first sealing member, and including a microchannel and a micropillar on the microchannel.

An electric circuit board includes an insulating substrate, a metal plate, and a brazing material with which the insulating substrate and the metal plate are joined together. The metal plate has a side surface over which recessed portions are scattered. The side surface of the metal plate has lines in regions around the recessed portions. The metal plate is made of copper or a copper alloy. The brazing material has a side surface that is continuous with the side surface of the metal plate. The brazing material is a silver-copper brazing alloy. A ratio of copper on the side surface of the brazing material is higher than a copper component ratio of the silver-copper brazing alloy.

There is provided a semiconductor module capable of preventing the adhesion of an epoxy resin to terminals to which at least one of a large current and a high voltage is supplied. A semiconductor module includes: a sealing section formed of an epoxy resin and sealing transistors; an intermediate terminal having a fastening surface to which a cable connected to a load as a drive target is fastened in a direction intersecting the thickness direction of a sealing section and connected to the transistors; and a structure arranged between the sealing section and the fastening surface and having an input section higher than a surface of the sealing section and the fastening surface.

A semiconductor module (semiconductor device) includes a case that has a side wall to form a frame, the side wall having a concave portion, a multi-layer structure in which a first terminal, an insulating sheet, and a second terminal are stacked in that order and which is disposed on the concave portion, and a beam member that is attached to the concave portion of the case to fix the multi-layer structure disposed on the concave portion.

A chip on film package according to one embodiment of the present disclosure includes: a base film; a wiring unit located on the base film; a semiconductor chip mounted on the wiring unit; a first heat dissipation unit configured to come into contact with the semiconductor chip; a second heat dissipation unit configured to come into contact with the first heat dissipation unit, and comprise a metal; and an adhesive unit configured to attach the base film on which the wiring unit is located and the semiconductor chip is mounted to the second heat dissipation unit with the first heat dissipation unit therebetween.

There is disclosed a packaged semiconductor device comprising: a leadframe having a first thickness; the leadframe comprising a die pad; a semiconductor die thereabove; and epoxy therebetween and arranged to bond the semiconductor die to the die pad; wherein in at least one region under the semiconductor die, the die pad has a second thickness less than the first thickness; wherein the die pad has at least one through-hole in the at least one region; and wherein the epoxy fills the at least one through-hole and extends thereunder and laterally beyond the through-hole. Corresponding leadframes, and an associated method of manufacture are also disclosed.

A semiconductor package includes a substrate, a semiconductor die, a lid, and an adhesive layer. The semiconductor die is attached to the substrate. The lid is over the semiconductor die and the substrate. The adhesive layer is sandwiched between the lid and the semiconductor die. The adhesive layer includes a metallic thermal interface material (TIM) layer and a polymeric TIM layer adjacent to the metallic TIM layer. The polymeric TIM layer is located on corners of the semiconductor die from a top view.

A semiconductor die package and a method of forming the same are provided. The semiconductor die package includes a package substrate, an interposer substrate over the package substrate, two semiconductor dies over the interposer substrate, and an underfill element formed over the interposer substrate and surrounding the semiconductor dies. A ring structure is disposed over the package substrate and surrounds the semiconductor dies. Recessed parts are recessed from the bottom surface of the ring structure. The recessed parts include multiple first recessed parts arranged in each corner area of the ring structure and two second recessed parts arranged in opposite side areas of the ring structure and aligned with a portion of the underfill element between the semiconductor dies. An adhesive layer is interposed between the bottom surface of the ring structure and the package substrate.

A semiconductor device includes: a semiconductor substrate in which a cell region, an isolation region being a region which is located outward of the cell region, and a termination region including a guard ring region being located outward of the isolation region and an excess region being a region which is located outward of the guard ring region are defined; an insulating layer covering a top surface of the semiconductor substrate in the isolation region and the termination region; a surface electrode located on a portion of the top surface of the semiconductor substrate and a portion of a top surface of the insulating layer in the cell region and the isolation region; and a waterproof layer covering a portion of the insulating layer exposed from the surface electrode. The waterproof layer is spaced apart from the surface electrode.

A semiconductor device includes: a semiconductor element; a sealing resin; a gate terminal; a drain terminal; a source terminal; a heat dissipation plate electrically connected to the drain, and protruding from a second side intersecting with a first side of the sealing resin in top view; and a heat dissipation plate electrically connected to the drain, and protruding from a third side opposing the second side of the sealing resin in top view. At least a height position of a lower surface of a distal end portion of the heat dissipation plate and a height position of an upper surface of a proximal end portion of the heat dissipation plate or a height position of a lower surface of a distal end portion of the heat dissipation plate and a height position of an upper surface of a proximal end portion of the heat dissipation plate are the same.