H01L23/315

RADIO FREQUENCY MODULE

A mounting substrate has one main surface (a first main surface). An electronic component has a first face, a second face, and a side face, and is provided on the one main surface of the mounting substrate. A solder bump is disposed between the mounting substrate and the electronic component, and electrically connects the mounting substrate and the electronic component. A resin layer is provided on the one main surface of the mounting substrate to cover the electronic component. The first face is a face of the electronic component at a side opposite to the mounting substrate. The side face of the electronic component is in contact with the resin layer. A space is provided between at least a part of the first face and the resin layer in a thickness direction of the mounting substrate.

FLIPCHIP PACKAGE WITH AN IC HAVING A COVERED CAVITY COMPRISING METAL POSTS

A semiconductor package includes an IC having circuitry configured for at least one function with some nodes connected to bond pads, with first metal posts on the bond pads, and dome support metal posts configured in a ring having a top rim defining an inner cavity with solder on the top rim and extending over an area of the inner cavity for providing a solder dome that covers the inner cavity to provide a covered air cavity over a portion of the circuitry. A leadframe includes a plurality of leads or lead terminals. The IC is flipchip attached with a solder connection to the leadframe so that the first metal posts are attached to the leads or the lead terminals. A mold compound provides encapsulation for the semiconductor package except on at least a bottom side of the leads or lead terminals.

Package structure and manufacturing method thereof

A package structure include a ground plate, a semiconductor die, a molding compound, and an antenna element. The semiconductor die is located over the ground plate. The molding compound is located over the semiconductor die. The antenna element is located in the molding compound and overlaps with the ground plate along a stacking direction of the ground plate, the semiconductor die and the molding compound. The antenna element has a first side levelled with a first surface of the molding compound, and the ground plate is located between the semiconductor die and the antenna element.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
20230268310 · 2023-08-24 · ·

According to one embodiment, a semiconductor device includes: a circuit board; a first semiconductor chip mounted on a face of the circuit board; a resin film covering the first semiconductor chip; and a second semiconductor chip having a chip area larger than a chip area of the first semiconductor chip, the second semiconductor chip being stuck to an upper face of the resin film and mounted on the circuit board. The resin film entirely fits within an inner region of a bottom face of the second semiconductor chip when viewed in a stacking direction of the first and second semiconductor chips.

Semiconductor device and method of manufacture

A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.

SEMICONDUCTOR PACKAGES AND MANUFACTURING METHOD OF THE SAME

A semiconductor package includes a first substrate and a first semiconductor device. The first semiconductor device is bonded to the first substrate and includes a second substrate, a plurality of first dies and a second die. The first dies are disposed between the first substrate and the second substrate. The second die is surrounded by the first dies. A cavity is formed among the first dies, the first substrate and the second substrate, and a gap is formed between the second die and the first substrate.

SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a carrier, a first encapsulant, and an interposer. The first encapsulant is on the carrier and defines a cavity. The interposer is disposed between the first encapsulant and the cavity. The first encapsulant covers a portion of the interposer.

Forming Recesses in Molding Compound of Wafer to Reduce Stress
20230253370 · 2023-08-10 ·

A chip includes a semiconductor substrate, an electrical connector over the semiconductor substrate, and a molding compound molding a lower part of the electrical connector therein. A top surface of the molding compound is lower than a top end of the electrical connector. A recess extends from the top surface of the molding compound into the molding compound.

POWER SEMICONDUCTOR MODULE ARRANGEMENT AND METHODS FOR PRODUCING A SEMICONDUCTOR ARRANGEMENT
20230253291 · 2023-08-10 ·

A power semiconductor module arrangement includes a housing, a substrate arranged inside the housing, a printed circuit board arranged inside the housing distant from and in parallel to the substrate, an encapsulant at least partly filling the interior of the housing and covering the substrate and the printed circuit board, and a heat protective layer arranged inside the housing between the substrate and the printed circuit board, and extending in a plane that is parallel to the substrate and the printed circuit board. A thermal resistance of the heat protective layer is greater than a thermal resistance of the encapsulant.

Semiconductor Device and Method of Manufacturing Same

Provided is a semiconductor device and a method of manufacturing the semiconductor device that is capable of improving the connection reliability between an electronic element and a substrate in a semiconductor device in which the electronic element is fixed to the substrate. The semiconductor device includes: a substrate 10 provided with wirings and wiring connection parts 12 connected to the wirings; electronic elements 20, 30, 40, and 50 electrically connected to the wiring connection parts 12 and fixed to the substrate; and a resin film 60 laminated on one surface of the substrate 10, conforming to the shapes of the electronic elements 20, 30, 40, and 50, and covering the electronic elements 20, 30, 40, and 50.